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Date: Mon, 30 Nov 2015 10:06:12 -0800
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Subject: Re: svn commit: r291492 - in head/sys/arm: arm include
From: Adrian Chadd <adrian.chadd@gmail.com>
To: Michal Meloun <mmel@freebsd.org>
Cc: "src-committers@freebsd.org" <src-committers@freebsd.org>, 
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Hiya!

What's the semantics of this?

The mips24k/mips74k cores support a kind of write combining but only
within a cache line - ie, it buffers writes to the same cache line,
then the first non-cacheline access flushes it out. It's for things
like accelerated framebuffer writes. Is this similar to what you've
just added?


-a