From owner-svn-src-head@FreeBSD.ORG Tue Jul 31 19:14:22 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id BD9E9106564A; Tue, 31 Jul 2012 19:14:22 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 8FBC18FC14; Tue, 31 Jul 2012 19:14:22 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q6VJEMWG062142; Tue, 31 Jul 2012 19:14:22 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q6VJEMir062140; Tue, 31 Jul 2012 19:14:22 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <201207311914.q6VJEMir062140@svn.freebsd.org> From: Warner Losh Date: Tue, 31 Jul 2012 19:14:22 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r238955 - head/sys/arm/at91 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 31 Jul 2012 19:14:22 -0000 Author: imp Date: Tue Jul 31 19:14:22 2012 New Revision: 238955 URL: http://svn.freebsd.org/changeset/base/238955 Log: Allow chip selects other than 0. The SAM9260EK board has its dataflash on CS1. Modified: head/sys/arm/at91/at91_spi.c Modified: head/sys/arm/at91/at91_spi.c ============================================================================== --- head/sys/arm/at91/at91_spi.c Tue Jul 31 18:47:17 2012 (r238954) +++ head/sys/arm/at91/at91_spi.c Tue Jul 31 19:14:22 2012 (r238955) @@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$"); #include +#include #include #include @@ -144,6 +145,7 @@ at91_spi_attach(device_t dev) * memory and APB bandwidth. * Also, currently we lack a way for lettting both the board and the * slave devices take their maximum supported SPI clocks into account. + * Also, we hard-wire SPI mode to 3. */ csr = SPI_CSR_CPOL | (4 << 16) | (0xff << 8); WR4(sc, SPI_CSR0, csr); @@ -285,7 +287,10 @@ at91_spi_transfer(device_t dev, device_t */ WR4(sc, PDC_PTCR, PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS); -#ifdef SPI_CHIPSEL_SUPPORT + /* + * PSCDEC = 0 has a range of 0..3 for chip select. We + * don't support PSCDEC = 1 which has a range of 0..15. + */ if (cmd->cs < 0 || cmd->cs > 3) { device_printf(dev, "Invalid chip select %d requested by %s\n", cmd->cs, @@ -293,18 +298,23 @@ at91_spi_transfer(device_t dev, device_t err = EINVAL; goto out; } + #ifdef SPI_CHIP_SELECT_HIGH_SUPPORT + /* + * The AT91RM9200 couldn't do CS high for CS 0. Other chips can, but we + * don't support that yet, or other spi modes. + */ if (at91_is_rm92() && cmd->cs == 0 && (cmd->flags & SPI_CHIP_SELECT_HIGH) != 0) { device_printf(dev, - "Invalid chip select high requested by %s\n", + "Invalid chip select high requested by %s for cs 0.\n", device_get_nameunit(child)); err = EINVAL; goto out; } #endif - WR4(sc, SPI_MR, (RD4(sc, SPI_MR) & ~0x000f0000) | CS_TO_MR(cmd->cs)); -#endif + err = (RD4(sc, SPI_MR) & ~0x000f0000) | CS_TO_MR(cmd->cs); + WR4(sc, SPI_MR, err); /* * Set up the TX side of the transfer.