Date: Tue, 18 Mar 2014 05:55:33 -0700 From: Adrian Chadd <adrian@freebsd.org> To: "freebsd-embedded@freebsd.org" <freebsd-embedded@freebsd.org> Subject: Re: nand controller - how should one handle controllers that want the command+address bits together? Message-ID: <CAJ-VmomM=8M420-LC0z1CoZcz%2BjRBKx4n31ebtbfWG8_xF4Npw@mail.gmail.com> In-Reply-To: <CAJ-VmonpUsvXFHMCyH--3S4AEocTjhESCyjp9UmT-w5GyuZmvw@mail.gmail.com> References: <CAJ-VmonpUsvXFHMCyH--3S4AEocTjhESCyjp9UmT-w5GyuZmvw@mail.gmail.com>
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.. wow. So, this gets even more problematic. The AR934x NAND controller does DMA for the read/program phases as well as command results (eg READID.) Now, I can likely easily hack around it for simple commands like READID by overloading the nfc_start_command() method. For the read phase, I'd have to do a copy out of the buffer into the buffer supplied to the NAND bus code. Cool, that's just highly inefficient (why aren't we doing buffer IO here again? Bueller?) but that's a different story. For the write phase though, it's totally horrible. I'd have to buffer the command byte(s), the address byte(s) and the NAND bus write (which would copy it into the outgoing buffer), then issue it all at once. So, at first glance: * why aren't these (command; address; address; start) method runs just wrapped up into a command method that looks vaguely like (command, command2, row, column, id, buffer) and let the controller code either unravel it into serialised writes out, or in the case of the ar934x NAND controller, use all that information to setup a DMA transfer; * .. and for reads/writes, the buffer is supplied here, so they can also be used to setup the DMA transfer, else they're just serialised out via port banging for dumber NAND controller latches. I really want to try and bring this flash chip up (even without hardware ECC) but I'm kinda worried that in order to do this cleanly I'm going to have to overhaul nandbus/nfc and a couple of NAND controllers I don't have (and currently don't want) hardware for. So, any help/ideas? Thanks, -a On 18 March 2014 04:35, Adrian Chadd <adrian@freebsd.org> wrote: > Hiya, > > I've got the atheros ar934x nand controller bits looking like they're > working on freebsd-head enough to send/receive a READID command with > an address of 0x0. However, the NAND controller sends commands with > the cmd and address phases as part of the command, rather than calling > send_command / send_address methods called multiple times. > > It seems like our nandbus and nand controller layer is a very thin > shim over what the NAND control messages look like, rather than some > higher level 'thing' that allows for slightly more intelligent (read: > DMA/ECC capable) hardware. > > So, what gives? > > > -a
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