From owner-freebsd-current@FreeBSD.ORG Mon Jun 1 08:30:38 2009 Return-Path: Delivered-To: current@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A96A2106566B; Mon, 1 Jun 2009 08:30:38 +0000 (UTC) (envelope-from rea-fbsd@codelabs.ru) Received: from 0.mx.codelabs.ru (0.mx.codelabs.ru [144.206.177.45]) by mx1.freebsd.org (Postfix) with ESMTP id 53B698FC1C; Mon, 1 Jun 2009 08:30:37 +0000 (UTC) (envelope-from rea-fbsd@codelabs.ru) DomainKey-Signature: a=rsa-sha1; q=dns; c=simple; s=one; d=codelabs.ru; h=Received:Date:From:To:Cc:Subject:Message-ID:Reply-To:References:MIME-Version:Content-Type:Content-Disposition:In-Reply-To:Sender; b=qz79GjZVivWlyQPMeKvaojIkB/R13u+yJ+kV4VUnd5cND2teJeuayMkwjgTgUqsw/Bt1GZkHZmfcBZoQZfpI5L6E11SlZYr2IlXneXd8fluDb3kkueQpEA7vrQ6ajql4w2wvqN+60j/90xwCjtWzD+suPXBQpa8zB8CweiZz4uo=; Received: from shadow.codelabs.ru (shadow.codelabs.ru [144.206.177.8]) by 0.mx.codelabs.ru with esmtpsa (TLSv1:AES256-SHA:256) id 1MB2gv-0000W9-Vm; Mon, 01 Jun 2009 12:16:22 +0400 Date: Mon, 1 Jun 2009 12:16:18 +0400 From: Eygene Ryabinkin To: Doug Barton Message-ID: References: <20090601042258.909C77302F@freebsd-current.sentex.ca> <4A2360BC.8040109@FreeBSD.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="ikeVEW9yuYc//A+q" Content-Disposition: inline In-Reply-To: <4A2360BC.8040109@FreeBSD.org> Sender: rea-fbsd@codelabs.ru Cc: ia64@freebsd.org, FreeBSD Tinderbox , current@freebsd.org Subject: Re: [head tinderbox] failure on ia64/ia64 X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: rea-fbsd@codelabs.ru List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jun 2009 08:30:39 -0000 --ikeVEW9yuYc//A+q Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Doug, good day. Sun, May 31, 2009 at 10:01:48PM -0700, Doug Barton wrote: > FYI, I'm aware of this issue and I've filed a bug report with the ISC > folks. If anyone has a bright idea on how to fix it I'm all ears, but > I tried everything I can think of already and no luck so far. Seems like GCC likes to see __attribute__ stuff only for function prototypes, not for declarations. The attached patch seems to fix the stuff, but I have no ia64 system to test on. Quick test with 'make ISC_ATOMIC_ARCH=ia64' eliminates errors. This is very weird (judging by the GCC's manual) since the simplest C program, ----- int main(void) { return 0; } void foo(void) __attribute__ ((unused)) { return; } ----- but ICC 10.x produces the same error and happily chewes __attribute__ on the function prototype. Anyway, I see no warnings even without '((unused)) attribute with -Wall, so '__attribute__ ((unused))' looks like no-op nowadays. -- Eygene _ ___ _.--. # \`.|\..----...-'` `-._.-'_.-'` # Remember that it is hard / ' ` , __.--' # to read the on-line manual )/' _/ \ `-_, / # while single-stepping the kernel. `-'" `"\_ ,_.-;_.-\_ ', fsc/as # _.-'_./ {_.' ; / # -- FreeBSD Developers handbook {_.-``-' {_/ # --ikeVEW9yuYc//A+q Content-Type: text/x-diff; charset=us-ascii Content-Disposition: attachment; filename="isc-unused.diff" --- contrib/bind9/lib/isc/ia64/include/isc/atomic.h.orig 2009-06-01 11:47:44.000000000 +0400 +++ contrib/bind9/lib/isc/ia64/include/isc/atomic.h 2009-06-01 12:01:19.000000000 +0400 @@ -30,11 +30,13 @@ * Open issue: can 'fetchadd' make the code faster for some particular values * (e.g., 1 and -1)? */ -static inline isc_int32_t -isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) #ifdef __GNUC__ -__attribute__ ((unused)) +static inline isc_int32_t +isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) __attribute__ ((unused)); #endif + +static inline isc_int32_t +isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) { isc_int32_t prev, swapped; @@ -56,11 +58,13 @@ /* * This routine atomically stores the value 'val' in 'p'. */ -static inline void -isc_atomic_store(isc_int32_t *p, isc_int32_t val) #ifdef __GNUC__ -__attribute__ ((unused)) +static inline void +isc_atomic_store(isc_int32_t *p, isc_int32_t val) __attribute__ ((unused)); #endif + +static inline void +isc_atomic_store(isc_int32_t *p, isc_int32_t val) { __asm__ volatile( "st4.rel %0=%1" @@ -75,11 +79,14 @@ * original value is equal to 'cmpval'. The original value is returned in any * case. */ +#ifdef __GNUC__ static inline isc_int32_t isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) -#ifdef __GNUC__ -__attribute__ ((unused)) +__attribute__ ((unused)); #endif + +static inline isc_int32_t +isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) { isc_int32_t ret; --ikeVEW9yuYc//A+q--