From owner-svn-src-head@FreeBSD.ORG Sun Nov 3 22:55:34 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 2D3728C7; Sun, 3 Nov 2013 22:55:34 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 018F52824; Sun, 3 Nov 2013 22:55:34 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rA3MtXmN080969; Sun, 3 Nov 2013 22:55:33 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id rA3MtXZK080968; Sun, 3 Nov 2013 22:55:33 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201311032255.rA3MtXZK080968@svn.freebsd.org> From: Ian Lepore Date: Sun, 3 Nov 2013 22:55:33 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r257595 - head/sys/arm/freescale/imx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 03 Nov 2013 22:55:34 -0000 Author: ian Date: Sun Nov 3 22:55:33 2013 New Revision: 257595 URL: http://svnweb.freebsd.org/changeset/base/257595 Log: Comments and style(9) only, no functional changes. Modified: head/sys/arm/freescale/imx/imx_machdep.c Modified: head/sys/arm/freescale/imx/imx_machdep.c ============================================================================== --- head/sys/arm/freescale/imx/imx_machdep.c Sun Nov 3 21:33:42 2013 (r257594) +++ head/sys/arm/freescale/imx/imx_machdep.c Sun Nov 3 22:55:33 2013 (r257595) @@ -158,34 +158,33 @@ bus_dma_get_range_nb(void) return (0); } +/* + * This code which manipulates the watchdog hardware is here to implement + * cpu_reset() because the watchdog is the only way for software to reset the + * chip. Why here and not in imx_wdog.c? Because there's no requirement that + * the watchdog driver be compiled in, but it's nice to be able to reboot even + * if it's not. + */ void imx_wdog_cpu_reset(vm_offset_t wdcr_physaddr) { + const struct pmap_devmap *pd; + volatile uint16_t * pcr; /* - * This code which manipulates the watchdog hardware is here to - * implement cpu_reset() because the watchdog is the only way for - * software to reset the chip. Why here and not in imx_wdog.c? Because - * there's no requirement that the watchdog driver be compiled in, but - * it's nice to be able to reboot even if it's not. + * The deceptively simple write of WDOG_CR_WDE enables the watchdog, + * sets the timeout to its minimum value (half a second), and also + * clears the SRS bit which results in the SFTW (software-requested + * reset) bit being set in the watchdog status register after the reset. + * This is how software can distinguish a reset from a wdog timeout. */ - volatile uint16_t * pcr; - const struct pmap_devmap *pd; - if ((pd = pmap_devmap_find_pa(wdcr_physaddr, 2)) == NULL) { printf("cpu_reset() can't find its control register... locking up now."); } else { pcr = (uint16_t *)(pd->pd_va + (wdcr_physaddr - pd->pd_pa)); - /* - * This deceptively simple write enables the watchdog, sets the timeout - * to its minimum value (half a second), and also clears the SRS bit - * which results in the SFTW (software-requested reset) bit being set in - * the watchdog status register after the reset. This is how software - * can distinguish a requested reset from a wdog timeout. - */ *pcr = WDOG_CR_WDE; } - while (1) + for (;;) continue; }