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From: Pyun YongHyeon <yongari@FreeBSD.org>
Date: Mon, 8 Dec 2008 02:34:13 +0000 (UTC)
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Subject: cvs commit: src/sys/dev/re if_re.c src/sys/pci if_rlreg.h
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yongari     2008-12-08 02:34:13 UTC

  FreeBSD src repository

  Modified files:
    sys/dev/re           if_re.c 
    sys/pci              if_rlreg.h 
  Log:
  SVN rev 185753 on 2008-12-08 02:34:13Z by yongari
  
  o Implemented miibus_statchg handler. It detects whether re(4)
    established a valid link or not. In miibus_statchg handler add a
    check for established link is valid one for the controller(e.g.
    1000baseT is not a valid link for fastethernet controllers.)
  o Added a flag RE_FLAG_FASTETHER to mark fastethernet controllers.
  o Added additional check to know whether we've really encountered
    watchdog timeouts or missed Tx completion interrupts. This change
    may help to track down the cause of watchdog timeouts.
  o In interrupt handler, removed a check for link state change
    interrupt. Not all controllers have the bit and re(4) did not
    rely on the event for a long time. In addition, re(4) didn't
    request the interrupt in RL_IMR register.
  
  Tested by:      rpaulo
  
  Revision  Changes    Path
  1.138     +51 -28    src/sys/dev/re/if_re.c
  1.86      +1 -0      src/sys/pci/if_rlreg.h