From owner-svn-src-all@freebsd.org Tue Feb 2 14:53:35 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id C03E7A98137; Tue, 2 Feb 2016 14:53:35 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 9BDD6113; Tue, 2 Feb 2016 14:53:35 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u12ErYf1042437; Tue, 2 Feb 2016 14:53:34 GMT (envelope-from mmel@FreeBSD.org) Received: (from mmel@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u12ErYal042433; Tue, 2 Feb 2016 14:53:34 GMT (envelope-from mmel@FreeBSD.org) Message-Id: <201602021453.u12ErYal042433@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mmel set sender to mmel@FreeBSD.org using -f From: Michal Meloun Date: Tue, 2 Feb 2016 14:53:34 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r295149 - in head/sys: arm/arm arm/include conf X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Feb 2016 14:53:35 -0000 Author: mmel Date: Tue Feb 2 14:53:34 2016 New Revision: 295149 URL: https://svnweb.freebsd.org/changeset/base/295149 Log: ARM: All remaining functions in cpufunc_asm_arm10.S are identical with functions in cpufunc_asm_arm9.S. Use arm9 variants and remove cpufunc_asm_arm10.S completly. Deleted: head/sys/arm/arm/cpufunc_asm_arm10.S Modified: head/sys/arm/arm/cpufunc.c head/sys/arm/include/cpufunc.h head/sys/conf/Makefile.arm head/sys/conf/files.arm Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Tue Feb 2 14:16:07 2016 (r295148) +++ head/sys/arm/arm/cpufunc.c Tue Feb 2 14:53:34 2016 (r295149) @@ -167,7 +167,7 @@ struct cpu_functions armv5_ec_cpufuncs = /* TLB functions */ armv4_tlb_flushID, /* tlb_flushID */ - arm10_tlb_flushID_SE, /* tlb_flushID_SE */ + arm9_tlb_flushID_SE, /* tlb_flushID_SE */ armv4_tlb_flushD, /* tlb_flushD */ armv4_tlb_flushD_SE, /* tlb_flushD_SE */ @@ -199,7 +199,7 @@ struct cpu_functions armv5_ec_cpufuncs = /* Soft functions */ - arm10_context_switch, /* context_switch */ + arm9_context_switch, /* context_switch */ arm10_setup /* cpu setup */ @@ -218,7 +218,7 @@ struct cpu_functions sheeva_cpufuncs = { /* TLB functions */ armv4_tlb_flushID, /* tlb_flushID */ - arm10_tlb_flushID_SE, /* tlb_flushID_SE */ + arm9_tlb_flushID_SE, /* tlb_flushID_SE */ armv4_tlb_flushD, /* tlb_flushD */ armv4_tlb_flushD_SE, /* tlb_flushD_SE */ @@ -250,7 +250,7 @@ struct cpu_functions sheeva_cpufuncs = { /* Soft functions */ - arm10_context_switch, /* context_switch */ + arm9_context_switch, /* context_switch */ arm10_setup /* cpu setup */ }; Modified: head/sys/arm/include/cpufunc.h ============================================================================== --- head/sys/arm/include/cpufunc.h Tue Feb 2 14:16:07 2016 (r295148) +++ head/sys/arm/include/cpufunc.h Tue Feb 2 14:53:34 2016 (r295149) @@ -225,11 +225,13 @@ void fa526_idcache_wbinv_range(vm_offset #endif -#ifdef CPU_ARM9 +#if defined(CPU_ARM9) || defined(CPU_ARM9E) void arm9_setttb (u_int); - void arm9_tlb_flushID_SE (u_int va); +void arm9_context_switch (void); +#endif +#if defined(CPU_ARM9) void arm9_icache_sync_all (void); void arm9_icache_sync_range (vm_offset_t, vm_size_t); @@ -241,8 +243,6 @@ void arm9_dcache_wb_range (vm_offset_t, void arm9_idcache_wbinv_all (void); void arm9_idcache_wbinv_range (vm_offset_t, vm_size_t); -void arm9_context_switch (void); - void arm9_setup (void); extern unsigned arm9_dcache_sets_max; @@ -252,10 +252,6 @@ extern unsigned arm9_dcache_index_inc; #endif #if defined(CPU_ARM9E) -void arm10_tlb_flushID_SE (u_int); - -void arm10_context_switch (void); - void arm10_setup (void); u_int sheeva_control_ext (u_int, u_int); Modified: head/sys/conf/Makefile.arm ============================================================================== --- head/sys/conf/Makefile.arm Tue Feb 2 14:16:07 2016 (r295148) +++ head/sys/conf/Makefile.arm Tue Feb 2 14:53:34 2016 (r295149) @@ -68,7 +68,6 @@ SYSTEM_LD_TAIL +=;sed s/" + SIZEOF_HEADE FILES_CPU_FUNC = \ $S/$M/$M/cpufunc_asm_arm9.S \ - $S/$M/$M/cpufunc_asm_arm10.S \ $S/$M/$M/cpufunc_asm_xscale.S $S/$M/$M/cpufunc_asm.S \ $S/$M/$M/cpufunc_asm_xscale_c3.S $S/$M/$M/cpufunc_asm_armv5_ec.S \ $S/$M/$M/cpufunc_asm_fa526.S $S/$M/$M/cpufunc_asm_sheeva.S \ Modified: head/sys/conf/files.arm ============================================================================== --- head/sys/conf/files.arm Tue Feb 2 14:16:07 2016 (r295148) +++ head/sys/conf/files.arm Tue Feb 2 14:53:34 2016 (r295149) @@ -11,8 +11,7 @@ arm/arm/busdma_machdep-v6.c optional ar arm/arm/copystr.S standard arm/arm/cpufunc.c standard arm/arm/cpufunc_asm.S standard -arm/arm/cpufunc_asm_arm9.S optional cpu_arm9 -arm/arm/cpufunc_asm_arm10.S optional cpu_arm9e +arm/arm/cpufunc_asm_arm9.S optional cpu_arm9 | cpu_arm9e arm/arm/cpufunc_asm_arm11.S optional cpu_arm1176 arm/arm/cpufunc_asm_arm11x6.S optional cpu_arm1176 arm/arm/cpufunc_asm_armv4.S optional cpu_arm9 | cpu_arm9e | cpu_fa526 | cpu_xscale_80321 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | cpu_xscale_80219 | cpu_xscale_81342