Date: Wed, 11 Sep 1996 14:54:05 -0600 From: Steve Passe <smp@csn.net> To: rv@groa.uct.ac.za (Russell Vincent) Cc: freebsd-smp@freebsd.org Subject: Re: Intel XXpress - some SMP benchmarks Message-ID: <199609112054.OAA11976@clem.systemsix.com> In-Reply-To: Your message of "Sat, 10 Sep 1996 11:26:52 %2B0200." <m0v0P5p-0004vdC@groa.uct.ac.za>
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Hi,
I have submitted formal bug reports via send-pr for the following 4 issues:
-------------------------------------------------------------------------------
Subject: SMP kernel fix 960909.1
---
It has the internal identification `kern/1591'.
>Category: kern
>Responsible: freebsd-bugs
>Synopsis: i386/i386/mpcore.s stores _mpfps at incorrect address
-------------------------------------------------------------------------------
Subject: SMP kernel fix 960909.2
---
It has the internal identification `kern/1592'.
>Category: kern
>Responsible: freebsd-bugs
>Synopsis: kernel incorrectly reads CPU # from APIC ID register
-------------------------------------------------------------------------------
Subject: SMP kernel fix 960909.3
---
It has the internal identification `kern/1593'.
>Category: kern
>Responsible: freebsd-bugs
>Synopsis: i386/i386/locore.s contains useless line
-------------------------------------------------------------------------------
Subject: SMP kernel fix 960909.4
---
It has the internal identification `kern/1594'.
>Category: kern
>Responsible: freebsd-bugs
>Synopsis: apic_startup() needs work
-------------------------------------------------------------------------------
===============================================================================
In addition to the kernel patches enumerated in send-pr reports `kern/1592'
and `kern/1594' the following patches need to be done for the XXPRESS to
run the SMP kernel. They are just band-aids and as such I didn't
feel they should be submitted to send-pr. The correct solution will
require some sort of 'physical' to 'virtual' mapping table for IDs.
The basis of the problem is that the kernel expects the BSP to have ID #0
and the AP to have ID #1. The Intel XXPRESS numbers it's CPUs 0 (BSP),
2, 3 and 4. These band-aids merely shift 2,3,4 to 1,2,3.
You also need to set the BIOS to use cache 'write-thru' as oppossed to
cache 'write-back' to make the XXPRESS happy.
-------------------------------------------------------------------------------
---
sys/i386/include/smp.h, line 25, change:
from:
return (apic_base[APIC_ID] >> 24);
to:
/* XPPRESS numbers CPUs 0, 2, 3, 4 */
unsigned int num = ((apic_base[APIC_ID] >> 24) & 0xf);
return num ? num-1 : 0;
---
sys/i386/include/smpasm.h:
add:
#define CPUNBR 0x02000000
add:
/* XPPRESS numbers CPUs 0, 2, 3, 4 */
#define MODIFY_XXPRESS_ID(reg) \
andl $0x0f000000, reg; \
je 9f; \
shrl $24,reg; \
decl reg; \
shll $24,reg; \
9: nop
change "GETCPUID()" macro to:
#define GETCPUID(reg) \
movl _apic_base, reg; \
movl APIC_ID(reg), reg; \
shrl $24, reg; \
andl $15, reg; \
je 9f; \
decl reg; \
9: nop
---
sys/i386/i386/locore.s:
line 268, change:
andl $0xff000000, %eax
to:
MODIFY_XXPRESS_ID(%eax)
---
sys/i386/i386/swtch.s:
line 452, change:
andl $0xff000000, %eax
to:
MODIFY_XXPRESS_ID(%eax)
---
sys/i386/i386/mplock.s:
line 48, change:
andl $0xff000000, %ecx
to:
MODIFY_XXPRESS_ID(%ecx)
line 59, change:
andl $0xff000000, %ecx
to:
MODIFY_XXPRESS_ID(%ecx)
line 87, change:
andl $0xff000000, %ecx
to:
MODIFY_XXPRESS_ID(%ecx)
line 99, change:
andl $0xff000000, %ecx
to:
MODIFY_XXPRESS_ID(%ecx)
===============================================================================
The last issue in the XXPRESS port was the "less code" works better bug.
Russel has since discovered that changing the cache option to "write-thru"
fixes this so I will not bother to descibe those experiments.
--
Steve Passe | powered by
smp@csn.net | FreeBSD
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