From owner-freebsd-embedded@FreeBSD.ORG Thu Mar 13 10:46:05 2008 Return-Path: Delivered-To: freebsd-embedded@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 991331065670 for ; Thu, 13 Mar 2008 10:46:05 +0000 (UTC) (envelope-from raj@semihalf.com) Received: from semihalf.com (semihalf.com [206.130.101.55]) by mx1.freebsd.org (Postfix) with ESMTP id 771CB8FC23 for ; Thu, 13 Mar 2008 10:46:05 +0000 (UTC) (envelope-from raj@semihalf.com) Received: from mail.semihalf.com (mail.semihalf.com [83.15.139.206]) by semihalf.com (8.13.1/8.13.1) with ESMTP id m2DAk3vu025636; Thu, 13 Mar 2008 04:46:04 -0600 Received: from localhost (unknown [127.0.0.1]) by mail.semihalf.com (Postfix) with ESMTP id 3D5F6143B5; Thu, 13 Mar 2008 11:56:41 +0100 (CET) Received: from mail.semihalf.com ([127.0.0.1]) by localhost (mail.semihalf.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 16338-05; Thu, 13 Mar 2008 11:56:39 +0100 (CET) Message-ID: <47D905E8.5020608@semihalf.com> Date: Thu, 13 Mar 2008 11:46:00 +0100 From: Rafal Jaworowski MIME-Version: 1.0 To: Jacques Fourie References: <47D7FA35.30204@semihalf.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-Virus-Scanned: by amavisd-new at semihalf.com Cc: freebsd-embedded@freebsd.org Subject: Re: Booting FreeBSD on MPC8540 eval board X-BeenThere: freebsd-embedded@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Dedicated and Embedded Systems List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Mar 2008 10:46:05 -0000 Jacques Fourie wrote: > Thanks - 'set hw.uart.console=mm:0xfef04500' fixed the console output for me. > From the console output I can see that miibus_probe() is failing for > all three ethernet devices. > > Here is the console output : > *snip* > > Here is some output obtained from uboot : > > MPC8540EVAL=> mii device > MII devices: 'TSEC0' 'TSEC1' 'FEC' > Current device: 'TSEC0' > MPC8540EVAL=> mii info > PHY 0x02: OUI = 0x04DE, Model = 0x0E, Rev = 0x02, 10baseT, HDX > PHY 0x04: OUI = 0x5043, Model = 0x06, Rev = 0x02, 100baseT, FDX > PHY 0x07: OUI = 0x5043, Model = 0x06, Rev = 0x02, 10baseT, HDX > PHY 0x1F: OUI = 0x0000, Model = 0x00, Rev = 0x00, 10baseT, HDX > MPC8540EVAL=> > PHY 0x02: OUI = 0x04DE, Model = 0x0E, Rev = 0x02, 10baseT, HDX > PHY 0x04: OUI = 0x5043, Model = 0x06, Rev = 0x02, 100baseT, FDX > PHY 0x07: OUI = 0x5043, Model = 0x06, Rev = 0x02, 10baseT, HDX > PHY 0x1F: OUI = 0x0000, Model = 0x00, Rev = 0x00, 10baseT, HDX > > Do I need some additional mods in the miibus code that is not in CVS? > I don't think so, just having miibus should suffice. The problem you're having is likely caused by a different MAC-PHY topology than is for CDS boards the port was mainly tested on. The hidden assumption we currently have requires a 1:1 mapping between TSEC units and PHY numbers they are 'routed' to. We don't deal too well with other/mixed MAC-PHY topologies that various systems can have. Please try this patch, or manipulate in a similar way, you'll get the idea: diff --git a/sys/dev/tsec/if_tsec.c b/sys/dev/tsec/if_tsec.c index a5aff35..bd3854b 100644 --- a/sys/dev/tsec/if_tsec.c +++ b/sys/dev/tsec/if_tsec.c @@ -1561,7 +1561,7 @@ tsec_miibus_readreg(device_t dev, int ph sc = device_get_softc(dev); - if (device_get_unit(dev) != phy) + if (phy != 4 || phy != 7) return (0); sc = tsec0_sc; Another thing, but not critical, is that we somehow seem to treat the third Ethernet controller as TSEC, which it isn't -- 8540 has FEC in addition to the two TSEC units, but FEC isn't supported at the moment at all, no driver etc. Rafal PS. Please boot with -v flag so that we can see more verbose output.