Date: Fri, 17 Oct 2008 03:33:19 GMT From: Nathan Whitehorn <nwhitehorn@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 151468 for review Message-ID: <200810170333.m9H3XJum053254@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=151468 Change 151468 by nwhitehorn@nwhitehorn_trantor on 2008/10/17 03:32:45 Fix some nagging page zeroing problems found with Mambo. We can now boot inside the simulator all the way to the panic where it complains about not having a PIC, which is a problem for another day. cpcht does try to attach, though :) Affected files ... .. //depot/projects/ppc-g5/sys/powerpc/aim/mmu_oea64.c#7 edit Differences ... ==== //depot/projects/ppc-g5/sys/powerpc/aim/mmu_oea64.c#7 (text+ko) ==== @@ -1011,7 +1011,6 @@ moea64_scratchpage_va[i],&j); moea64_scratchpage_pte[i] = moea64_pvo_to_pte( moea64_scratchpage_pvo[i],j); - moea64_scratchpage_pte[i]->pte_hi &= ~LPTE_VALID; UNLOCK_TABLE(); } @@ -1145,12 +1144,15 @@ (~LPTE_WIMG & ~LPTE_RPGN); moea64_scratchpage_pvo[which]->pvo_pte.lpte.pte_lo |= moea64_calc_wimg(pa) | (uint64_t)pa; + + moea64_scratchpage_pte[which]->pte_hi &= ~LPTE_VALID; + TLBIE(kernel_pmap, moea64_scratchpage_va[which]); moea64_scratchpage_pte[which]->pte_lo = moea64_scratchpage_pvo[which]->pvo_pte.lpte.pte_lo; + EIEIO(); moea64_scratchpage_pte[which]->pte_hi |= LPTE_VALID; - EIEIO(); TLBIE(kernel_pmap, moea64_scratchpage_va[which]); } @@ -2244,26 +2246,31 @@ pt = &moea64_pteg_table[pteidx >> 3].pt[pteidx & 7]; - if ((pvo->pvo_pte.lpte.pte_hi & LPTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { + if ((pvo->pvo_pte.lpte.pte_hi & LPTE_VALID) && + !PVO_PTEGIDX_ISSET(pvo)) { panic("moea64_pvo_to_pte: pvo %p has valid pte in pvo but no " "valid pte index", pvo); } - if ((pvo->pvo_pte.lpte.pte_hi & LPTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { + if ((pvo->pvo_pte.lpte.pte_hi & LPTE_VALID) == 0 && + PVO_PTEGIDX_ISSET(pvo)) { panic("moea64_pvo_to_pte: pvo %p has valid pte index in pvo " "pvo but no valid pte", pvo); } - if ((pt->pte_hi ^ (pvo->pvo_pte.lpte.pte_hi & ~LPTE_VALID)) == LPTE_VALID) { + if ((pt->pte_hi ^ (pvo->pvo_pte.lpte.pte_hi & ~LPTE_VALID)) == + LPTE_VALID) { if ((pvo->pvo_pte.lpte.pte_hi & LPTE_VALID) == 0) { panic("moea64_pvo_to_pte: pvo %p has valid pte in " "moea64_pteg_table %p but invalid in pvo", pvo, pt); } - if (((pt->pte_lo ^ pvo->pvo_pte.lpte.pte_lo) & ~(LPTE_CHG|LPTE_REF)) - != 0) { + if (((pt->pte_lo ^ pvo->pvo_pte.lpte.pte_lo) & + ~(LPTE_CHG|LPTE_REF)) != 0) { panic("moea64_pvo_to_pte: pvo %p pte does not match " - "pte %p in moea64_pteg_table difference is %#x", pvo, pt,(uint32_t)(pt->pte_lo ^ pvo->pvo_pte.lpte.pte_lo)); + "pte %p in moea64_pteg_table difference is %#x", + pvo, pt, + (uint32_t)(pt->pte_lo ^ pvo->pvo_pte.lpte.pte_lo)); } ASSERT_TABLE_LOCK();
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