From owner-svn-src-stable@freebsd.org Mon Jan 2 09:37:17 2017 Return-Path: Delivered-To: svn-src-stable@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 21920C9AFA0; Mon, 2 Jan 2017 09:37:17 +0000 (UTC) (envelope-from arybchik@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id F05D71BBE; Mon, 2 Jan 2017 09:37:16 +0000 (UTC) (envelope-from arybchik@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v029bGUB006351; Mon, 2 Jan 2017 09:37:16 GMT (envelope-from arybchik@FreeBSD.org) Received: (from arybchik@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v029bGgj006350; Mon, 2 Jan 2017 09:37:16 GMT (envelope-from arybchik@FreeBSD.org) Message-Id: <201701020937.v029bGgj006350@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: arybchik set sender to arybchik@FreeBSD.org using -f From: Andrew Rybchenko Date: Mon, 2 Jan 2017 09:37:16 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r311084 - stable/10/sys/dev/sfxge/common X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 02 Jan 2017 09:37:17 -0000 Author: arybchik Date: Mon Jan 2 09:37:15 2017 New Revision: 311084 URL: https://svnweb.freebsd.org/changeset/base/311084 Log: MFC r310754 sfxge(4): don't use Tx descriptor push with TSO option descriptors It is not safe to push TSO option descriptors if pacer bypass is enabled, so to make sure that doesn't happen never push TSO option descriptors. Submitted by: Mark Spender Sponsored by: Solarflare Communications, Inc. Modified: stable/10/sys/dev/sfxge/common/ef10_tx.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/dev/sfxge/common/ef10_tx.c ============================================================================== --- stable/10/sys/dev/sfxge/common/ef10_tx.c Mon Jan 2 09:35:58 2017 (r311083) +++ stable/10/sys/dev/sfxge/common/ef10_tx.c Mon Jan 2 09:37:15 2017 (r311084) @@ -470,9 +470,9 @@ fail1: } /* - * This improves performance by pushing a TX descriptor at the same time as the - * doorbell. The descriptor must be added to the TXQ, so that can be used if the - * hardware decides not to use the pushed descriptor. + * This improves performance by, when possible, pushing a TX descriptor at the + * same time as the doorbell. The descriptor must be added to the TXQ, so that + * can be used if the hardware decides not to use the pushed descriptor. */ void ef10_tx_qpush( @@ -492,16 +492,46 @@ ef10_tx_qpush( offset = id * sizeof (efx_qword_t); EFSYS_MEM_READQ(etp->et_esmp, offset, &desc); - EFX_POPULATE_OWORD_3(oword, - ERF_DZ_TX_DESC_WPTR, wptr, - ERF_DZ_TX_DESC_HWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_1), - ERF_DZ_TX_DESC_LWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_0)); - - /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */ - EFX_DMA_SYNC_QUEUE_FOR_DEVICE(etp->et_esmp, etp->et_mask + 1, wptr, id); - EFSYS_PIO_WRITE_BARRIER(); - EFX_BAR_TBL_DOORBELL_WRITEO(enp, ER_DZ_TX_DESC_UPD_REG, etp->et_index, - &oword); + + /* + * SF Bug 65776: TSO option descriptors cannot be pushed if pacer bypass + * is enabled on the event queue this transmit queue is attached to. + * + * To ensure the code is safe, it is easiest to simply test the type of + * the descriptor to push, and only push it is if it not a TSO option + * descriptor. + */ + if ((EFX_QWORD_FIELD(desc, ESF_DZ_TX_DESC_IS_OPT) != 1) || + (EFX_QWORD_FIELD(desc, ESF_DZ_TX_OPTION_TYPE) != + ESE_DZ_TX_OPTION_DESC_TSO)) { + /* Push the descriptor and update the wptr. */ + EFX_POPULATE_OWORD_3(oword, ERF_DZ_TX_DESC_WPTR, wptr, + ERF_DZ_TX_DESC_HWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_1), + ERF_DZ_TX_DESC_LWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_0)); + + /* Ensure ordering of memory (descriptors) and PIO (doorbell) */ + EFX_DMA_SYNC_QUEUE_FOR_DEVICE(etp->et_esmp, etp->et_mask + 1, + wptr, id); + EFSYS_PIO_WRITE_BARRIER(); + EFX_BAR_TBL_DOORBELL_WRITEO(enp, ER_DZ_TX_DESC_UPD_REG, + etp->et_index, &oword); + } else { + efx_dword_t dword; + + /* + * Only update the wptr. This is signalled to the hardware by + * only writing one DWORD of the doorbell register. + */ + EFX_POPULATE_OWORD_1(oword, ERF_DZ_TX_DESC_WPTR, wptr); + dword = oword.eo_dword[2]; + + /* Ensure ordering of memory (descriptors) and PIO (doorbell) */ + EFX_DMA_SYNC_QUEUE_FOR_DEVICE(etp->et_esmp, etp->et_mask + 1, + wptr, id); + EFSYS_PIO_WRITE_BARRIER(); + EFX_BAR_TBL_WRITED2(enp, ER_DZ_TX_DESC_UPD_REG, + etp->et_index, &dword, B_FALSE); + } } __checkReturn efx_rc_t