From owner-freebsd-bugs@FreeBSD.ORG Fri Oct 24 14:58:31 2014 Return-Path: Delivered-To: freebsd-bugs@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 8DA7BA97 for ; Fri, 24 Oct 2014 14:58:31 +0000 (UTC) Received: from kenobi.freebsd.org (kenobi.freebsd.org [IPv6:2001:1900:2254:206a::16:76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 74556E6A for ; Fri, 24 Oct 2014 14:58:31 +0000 (UTC) Received: from bugs.freebsd.org ([127.0.1.118]) by kenobi.freebsd.org (8.14.9/8.14.9) with ESMTP id s9OEwV6K078571 for ; Fri, 24 Oct 2014 14:58:31 GMT (envelope-from bugzilla-noreply@freebsd.org) From: bugzilla-noreply@freebsd.org To: freebsd-bugs@FreeBSD.org Subject: [Bug 192316] Invariant TSC gets misdetected on Intel Core 2 Duo processors, resulting in sluggish system behavior Date: Fri, 24 Oct 2014 14:58:31 +0000 X-Bugzilla-Reason: AssignedTo X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: Base System X-Bugzilla-Component: kern X-Bugzilla-Version: 11.0-CURRENT X-Bugzilla-Keywords: X-Bugzilla-Severity: Affects Some People X-Bugzilla-Who: jhb@FreeBSD.org X-Bugzilla-Status: In Discussion X-Bugzilla-Priority: --- X-Bugzilla-Assigned-To: freebsd-bugs@FreeBSD.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: https://bugs.freebsd.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: freebsd-bugs@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Bug reports List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 24 Oct 2014 14:58:31 -0000 https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=192316 --- Comment #4 from John Baldwin --- I have a possible patch that will disable Cx entirely if you force the use of TSC on one of these CPUs. However, can you do one more test for me. Can you let your system use _CST as normal but restrict your C states to only using C1? I want to make sure that C1E also stops the TSC. (I'm pretty sure it does.) I think we don't use C2 by default, so if you haven't explicitly changed something in sysctl.conf or rc.conf to enable C2 and you are having problems with the TSC as a timecounter, that would count as a test. -- You are receiving this mail because: You are the assignee for the bug.