From nobody Mon Feb 19 16:44:51 2024 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4TdpKw02Zkz5C91k; Mon, 19 Feb 2024 16:44:52 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4TdpKv6Cc0z4b4x; Mon, 19 Feb 2024 16:44:51 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1708361091; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ivnWxvwL4M1k7yDyzcj69f2RzFa5GxfsQibdQ/3l23k=; b=refq4YOrZ4K5S5SWQ35S5EfxtR+NRm/Z4ykHQyXZi7zULTkK15B4SeTGWXyF/m6ccZORdf M2yECY3jfqcgWqcjFjijGnUOBweotoLRc26DtXnsXXoQNYuz390WTEEGXwYnWwOHvSPRB6 p3XpbLafxj4WhITlG7Ml9xXM2YOsgy6JANVjnFJcjeYMvgh6X9cWGFuPVq6Np3rPIbs7fG dDFx6QNcWfHhEsIzUSC8pQIfvFUWFXWmrbmpDfuzI+NR2rC3BgcDtnhRF2M+HShGpYMxZ7 uNeCfaY7TkWDdSzYrmJ8LZjeBmqE8MXQAU6Vng8g6mfxYES4QXrULhuoJ24jRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1708361091; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ivnWxvwL4M1k7yDyzcj69f2RzFa5GxfsQibdQ/3l23k=; b=BqHwUJlXCkKRPH950kTcEcFkfhnOgjfIy0C2IbXlCDHY2xJK5poHrdLTjnRvcPj7GfUtQF UcNhRPSGztn0aEUyYkFYyMp+u/AgfDi+qZTbW7y+u3/VD8Kt5Hygx1g9qy2zDKTV0rNuk3 FnVUqeDBJpt1EzTR3trj9VqMJD7ycgMiRcueE86lxj2XjP0jL2FsKt1TLW8Dw8iH7ylO5g c6lyYqKnxm74AtHG1V1s4g6kQXDW/0gQk/0Us0kanIFnZdzfgxiZ9Dg+N/eQoSW1QvL/L/ xQKz5X1A6XDhQTDlACNtfUxfxKSDJTwl7ZauYytLTLycZDuVoH8zvC9/0jxkgw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1708361091; a=rsa-sha256; cv=none; b=C06czp7j2vwLY1L4O2zpoQHhCVUIWo4H0Xewa19N10fDKrjtZbejukf9qsZ9xP8jKat8O4 pEBbCfxIu76oKZcEHTYuYj82tKgeZ71mJ3ZkICsOXdjEN69obPYhYy0DsLCl/Tf0TYUk/u yllHt7lsF27jpN4QYeREqFX1weE9/UiKqVoc+Soe47rh6U+2GEQqwF89zjsZk/hLcQGllk szKK23/F2cFvAMpge05KdAHq18C1xKd/zQZkuQ2VqTsiqVszQfh1TV8Bsjrhlu6FhL9gfD aVYaXqXLRIX3pXz9igseQFVTaMb8kGxCcdQzmDOjOF0tuom9CWyDSbeyT19aCQ== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4TdpKv5F1Mzj9Q; Mon, 19 Feb 2024 16:44:51 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 41JGipoV094041; Mon, 19 Feb 2024 16:44:51 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 41JGipn3094038; Mon, 19 Feb 2024 16:44:51 GMT (envelope-from git) Date: Mon, 19 Feb 2024 16:44:51 GMT Message-Id: <202402191644.41JGipn3094038@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Andrew Turner Subject: git: 2bcdaf2b58ba - stable/13 - arm64: Add BTI landing pads to assembly functions List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-branches@freebsd.org X-BeenThere: dev-commits-src-branches@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 2bcdaf2b58badd91686af190825d994cddfcdc38 Auto-Submitted: auto-generated The branch stable/13 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=2bcdaf2b58badd91686af190825d994cddfcdc38 commit 2bcdaf2b58badd91686af190825d994cddfcdc38 Author: Andrew Turner AuthorDate: 2023-10-03 08:52:02 +0000 Commit: Andrew Turner CommitDate: 2024-02-19 12:40:03 +0000 arm64: Add BTI landing pads to assembly functions When we enable BTI iboth the first instruction in a function that could be called indirectly, and a branch within a function need a valid landing pad instruction. There are three options for these instructions: 1. A breakpoint instruction 2. A pointer authentication PACIASP/PACIBSP 3. A BTI instruction Option 1 will raise a breakpoint exception so isn't useable in either cases. Option 2 could be used in some function entry cases, but needs to be paired with an authentication instruction, and is normally only used in non-leaf functions we can't use it in this case. This leaves option 3. There are four variants of the instruction, the C variant is used on function entry and the J variant is for jumping within a function. There is also a JC that works with both and one with no target that works with neither. Reviewed by: markj Sponsored by: Arm Ltd Sponsored by: The FreeBSD Foundation (earlier version) Differential Revision: https://reviews.freebsd.org/D42078 (cherry picked from commit e340882d3e49a98aa39b13041a2bf714c30dccdf) --- sys/arm64/arm64/locore.S | 4 ++++ sys/arm64/include/asm.h | 30 +++++++++++++++++++++++++++++- 2 files changed, 33 insertions(+), 1 deletion(-) diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index d48984e39a59..58f0ad8d85aa 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -99,6 +99,8 @@ ENTRY(_start) br x15 virtdone: + BTI_J + /* Set up the stack */ adrp x25, initstack_end add x25, x25, :lo12:initstack_end @@ -199,6 +201,8 @@ ENTRY(mpentry) br x15 mp_virtdone: + BTI_J + /* Start using the AP boot stack */ ldr x4, =bootstack ldr x4, [x4] diff --git a/sys/arm64/include/asm.h b/sys/arm64/include/asm.h index 783e8ee82c66..cfbcd2623e69 100644 --- a/sys/arm64/include/asm.h +++ b/sys/arm64/include/asm.h @@ -44,7 +44,7 @@ #define LENTRY(sym) \ .text; .align 2; .type sym,#function; sym: \ - .cfi_startproc; DTRACE_NOP + .cfi_startproc; BTI_C; DTRACE_NOP #define ENTRY(sym) \ .globl sym; LENTRY(sym) #define EENTRY(sym) \ @@ -110,4 +110,32 @@ dsb sy; \ isb +/* + * When a CPU that implements FEAT_BTI uses a BR/BLR instruction (or the + * pointer authentication variants, e.g. BLRAA) and the target location + * has the GP attribute in its page table, then the target of the BR/BLR + * needs to be a valid BTI landing pad. + * + * BTI_C should be used at the start of a function and is used in the + * ENTRY macro. It can be replaced by PACIASP or PACIBSP, however these + * also need an appropriate authenticate instruction before returning. + * + * BTI_J should be used as the target instruction when branching with a + * BR instruction within a function. + * + * When using a BR to branch to a new function, e.g. a tail call, then + * the target register should be x16 or x17 so it is compatible with + * the BRI_C instruction. + * + * As these instructions are in the hint space they are a NOP when + * the CPU doesn't implement FEAT_BTI so are safe to use. + */ +#ifdef __ARM_FEATURE_BTI_DEFAULT +#define BTI_C hint #34 +#define BTI_J hint #36 +#else +#define BTI_C +#define BTI_J +#endif + #endif /* _MACHINE_ASM_H_ */