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From: "Jayachandran C." <jchandra@FreeBSD.org>
Date: Fri, 27 Aug 2010 19:53:57 +0000 (UTC)
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Subject: cvs commit: src/sys/mips/rmi interrupt.h intr_machdep.c iodi.c
 pic.h xlr_machdep.c xlr_pci.c
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jchandra    2010-08-27 19:53:57 UTC

  FreeBSD src repository

  Modified files:
    sys/mips/rmi         interrupt.h intr_machdep.c iodi.c pic.h 
                         xlr_machdep.c xlr_pci.c 
  Log:
  SVN rev 211893 on 2010-08-27 19:53:57Z by jchandra
  
  Revamp XLR interrupt handling, the previous scheme does not work well on
  SMP.
  
  We used to route all PIC based interrupts to cpu 0, and used the per-CPU
  interrupt mask to enable/disable interrupts. But the interrupt threads can
  run on any cpu on SMP, and the interrupt thread will re-enable the interrupts
  on the CPU it runs on when it is done, and not on cpu0 where the PIC will
  still send interrupts to.
  
  The fix is move the disable/enable for PIC based interrupts to PIC, we will
  ack on PIC only when the interrupt thread is done, and we do not use the
  per-CPU interrupt mask.
  
  The changes also introduce a way for subsystems to add a function that
  will be called to clear the interrupt on the subsystem. Currently This is
  used by the PCI/PCIe for doing additional work during the interrupt
  handling.
  
  Revision  Changes    Path
  1.4       +4 -5      src/sys/mips/rmi/interrupt.h
  1.8       +81 -49    src/sys/mips/rmi/intr_machdep.c
  1.8       +3 -3      src/sys/mips/rmi/iodi.c
  1.9       +10 -39    src/sys/mips/rmi/pic.h
  1.18      +4 -4      src/sys/mips/rmi/xlr_machdep.c
  1.7       +8 -29     src/sys/mips/rmi/xlr_pci.c