From owner-cvs-src@FreeBSD.ORG Fri Aug 22 02:15:36 2008 Return-Path: Delivered-To: cvs-src@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2677E1065674; Fri, 22 Aug 2008 02:15:36 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 10B278FC08; Fri, 22 Aug 2008 02:15:36 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.2/8.14.2) with ESMTP id m7M2FZ5v062080; Fri, 22 Aug 2008 02:15:35 GMT (envelope-from jhb@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.2/8.14.1/Submit) id m7M2FZTM062079; Fri, 22 Aug 2008 02:15:35 GMT (envelope-from jhb@repoman.freebsd.org) Message-Id: <200808220215.m7M2FZTM062079@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to jhb@repoman.freebsd.org using -f From: John Baldwin Date: Fri, 22 Aug 2008 02:14:23 +0000 (UTC) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Cc: Subject: cvs commit: src/sys/amd64/include pci_cfgreg.h src/sys/amd64/pci pci_cfgreg.c src/sys/dev/acpica acpi.c src/sys/i386/include pci_cfgreg.h src/sys/i386/pci pci_cfgreg.c X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Aug 2008 02:15:36 -0000 jhb 2008-08-22 02:14:23 UTC FreeBSD src repository Modified files: sys/amd64/include pci_cfgreg.h sys/amd64/pci pci_cfgreg.c sys/dev/acpica acpi.c sys/i386/include pci_cfgreg.h sys/i386/pci pci_cfgreg.c Log: SVN rev 181987 on 2008-08-22 02:14:23Z by jhb Extend the support for PCI-e memory mapped configuration space access: - Rename pciereg_cfgopen() to pcie_cfgregopen() and expose it to the rest of the kernel. It now also accepts parameters via function arguments rather than global variables. - Add a notion of minimum and maximum bus numbers and reject requests for an out of range bus. - Add more range checks on slot/func/reg/bytes parameters to the cfg reg read/write routines. Don't panic on any invalid parameters, just fail the request (writes do nothing, reads return -1). This matches the behavior of the other cfg mechanisms. - Port the memory mapped configuration space access to amd64. On amd64 we simply use the direct map (via pmap_mapdev()) for the memory mapped window. - During acpi_attach() just after loading the ACPI tables, check for a MCFG table. If it exists, call pciereg_cfgopen() on each subtable (memory mapped window). For now we only support windows for domain 0 that start with bus 0. This removes the need for more chipset-specific quirks in the MD code. - Remove the chipset-specific quirks for the Intel 5000P/V/Z chipsets since these machines should all have MCFG tables via ACPI. - Updated pci_cfgregopen() to DTRT if ACPI had invoked pcie_cfgregopen() earlier. MFC after: 2 weeks Revision Changes Path 1.15 +1 -0 src/sys/amd64/include/pci_cfgreg.h 1.111 +137 -3 src/sys/amd64/pci/pci_cfgreg.c 1.251 +41 -0 src/sys/dev/acpica/acpi.c 1.15 +1 -0 src/sys/i386/include/pci_cfgreg.h 1.130 +42 -36 src/sys/i386/pci/pci_cfgreg.c