Date: Sun, 02 Jan 2005 21:14:03 -0700 (MST) From: "M. Warner Losh" <imp@bsdimp.com> To: nate@root.org Cc: freebsd-acpi@freebsd.org Subject: Re: ACPI C3 patch for atheros Message-ID: <20050102.211403.112818487.imp@bsdimp.com> In-Reply-To: <41D8C5CF.4020606@root.org> References: <41D8B4D2.4050700@root.org> <20050102.210400.71551976.imp@bsdimp.com> <41D8C5CF.4020606@root.org>
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In message: <41D8C5CF.4020606@root.org>
Nate Lawson <nate@root.org> writes:
: M. Warner Losh wrote:
: > 0x41 isn't in the standard config space. It ends at 0x3f. Therefore,
: > it won't have a PCIR_ define, since it is device specific.
:
: Ah, didn't notice that. It should have an ATH_PCIR define then.
:
: > : It looks like these config writes in ath_pci_attach() should probably be
: > : done in the PCI bus but they may be driver-specific. The saves of
: > : config space in ath_pci_suspend/resume() are definitely suspect since we
: > : save/resume all config space now. See sys/dev/pci/pci.c
: >
: > No, we don't. We save only the specific portion of the config space
: > that we know something about. We also only do the read-write portions
: > of the config space. Drivers are required to save/restore the device
: > specific portion of pci config space.
:
: Correct, this is a device-specific config register although the others I
: pointed out (INTLINE, etc.) are standard and are covered by the PCI bus.
True. Those are now saved/restored... I thought you were
specifically talking about this one...
Warner
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