From owner-freebsd-smp Thu Apr 27 9: 1:22 2000 Delivered-To: freebsd-smp@freebsd.org Received: from Ilsa.StevesCafe.com (Ilsa.StevesCafe.com [206.168.13.65]) by hub.freebsd.org (Postfix) with ESMTP id 459EF37B573 for ; Thu, 27 Apr 2000 09:01:18 -0700 (PDT) (envelope-from fbsd@Ilsa.StevesCafe.com) Received: from Ilsa.StevesCafe.com (localhost [127.0.0.1]) by Ilsa.StevesCafe.com (8.9.3/8.9.3) with ESMTP id KAA24638; Thu, 27 Apr 2000 10:01:08 -0600 (MDT) (envelope-from fbsd@Ilsa.StevesCafe.com) Message-Id: <200004271601.KAA24638@Ilsa.StevesCafe.com> X-Mailer: exmh version 2.0.2 2/24/98 From: Steve Passe To: Luoqi Chen Cc: bright@wintelcom.net, djb@ifa.au.dk, freebsd-smp@FreeBSD.ORG Subject: Re: hlt instructions and temperature issues In-reply-to: Your message of "Thu, 27 Apr 2000 11:33:50 EDT." <200004271533.e3RFXoI01828@lor.watermarkgroup.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Thu, 27 Apr 2000 10:01:08 -0600 Sender: owner-freebsd-smp@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.org Hi, > No, we don't use hlt instruction on SMP. We could, but I guess nobody > bothered to work on it. It should be fairly straight forward: prior to > hlt, lower TPR priority so that this processor is first in line to > receive an interrupt. If you are interested, you may give the follwing > patch a try. > > -lq > > Index: swtch.s > =================================================================== > RCS file: /home/ncvs/src/sys/i386/i386/swtch.s,v > retrieving revision 1.91 > diff -u -r1.91 swtch.s > --- swtch.s 2000/03/29 06:15:38 1.91 > +++ swtch.s 2000/04/27 15:31:11 > @@ -258,9 +258,14 @@ > > ENTRY(default_halt) > sti > -#ifndef SMP > - hlt /* XXX: until a wakeup IPI */ > +#ifdef SMP > +#ifdef CHEAP_TPR > + movl $0, lapic_tpr > +#else > + andl $~APIC_TPR_PRIO, lapic_tpr > +#endif /** CHEAP_TPR */ > #endif > + hlt > ret That won't help, we already make it first candidate for an INT in idle(): 2: /* enable intrs for a halt */ movl $0, lapic_tpr /* 1st candidate for an INT */ call *_hlt_vector /* wait for interrupt */ cli jmp idle_loop The problem is that if a CPU is in the hlt'd state it will never re-enter cpu_switch() to be able to be assigned a new process, at least until it happens to catch an INT that wakes it up and leaves it in cpu_switch at a point where there is another ready process. It isn't guaranteed that the first INT will be sent to the halted CPU, especially in a >2 CPU machine. As I stated before, code is needed that sends a wakeup IPI from cpu_switch() when the running CPU detects both a hlt'de CPU and more than 1 READY process in the que. -- Steve Passe | powered by smp@csn.net | Symmetric MultiProcessor FreeBSD To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message