From owner-svn-src-head@freebsd.org Wed Nov 9 04:31:56 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D42A0C35EFD; Wed, 9 Nov 2016 04:31:56 +0000 (UTC) (envelope-from manu@bidouilliste.com) Received: from mail.blih.net (mail.blih.net [212.83.177.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mail.blih.net", Issuer "mail.blih.net" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id EA61823E; Wed, 9 Nov 2016 04:31:55 +0000 (UTC) (envelope-from manu@bidouilliste.com) Received: from mail.blih.net (mail.blih.net [212.83.177.182]) by mail.blih.net (OpenSMTPD) with ESMTP id 0885ac72; Wed, 9 Nov 2016 05:26:59 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=bidouilliste.com; h=date :from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; s=mail; bh=MVGPoLG9qUDP/cxRew0tkd86/5c=; b=j1OGgYmMOVAUSjCACvlKla3Ngsrs oLjok1AT+hiFRmx90EUF59IcEQAe5XuuJp1EQ75sh3uIqYG4nNJmkGEo/Sx19XxJ PZtEM/jJf1usBHgeoAj3d2WtgxF+L9wVxEF+m5ip+cFeKnBC3P114qkRWLusyrMm XmBwjakYklVNsVM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=bidouilliste.com; h=date :from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; q=dns; s= mail; b=WSktQoPGn0z4ONDwU9pfwLWRqYyIZ6XOU5M/HHweBTzkhnpgWslS/RzH QrT7wZNby+Zbx8uhGNiLEhjm7PTkYOueYWk0B6meevjxA7m11i5fwCrx+EH7MWMg fHhBt88b95tbCqPs2FLg3htxucJMyo2tHXV4dAB/aFixWG6079Q= Received: from knuckles.blih.net (ip-54.net-82-216-203.roubaix.rev.numericable.fr [82.216.203.54]) by mail.blih.net (OpenSMTPD) with ESMTPSA id 3277d5ef TLS version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO; Wed, 9 Nov 2016 05:26:59 +0100 (CET) Date: Wed, 9 Nov 2016 05:26:56 +0100 From: Emmanuel Vadot To: Luiz Otavio O Souza Cc: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: Re: svn commit: r308458 - in head/sys: boot/fdt/dts/arm modules/dtb/am335x Message-Id: <20161109052656.76911ada273bb14048bb999b@bidouilliste.com> In-Reply-To: <201611090407.uA947Fnu065307@repo.freebsd.org> References: <201611090407.uA947Fnu065307@repo.freebsd.org> X-Mailer: Sylpheed 3.5.1 (GTK+ 2.24.29; amd64-portbld-freebsd12.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 09 Nov 2016 04:31:56 -0000 On Wed, 9 Nov 2016 04:07:15 +0000 (UTC) Luiz Otavio O Souza wrote: > Author: loos > Date: Wed Nov 9 04:07:15 2016 > New Revision: 308458 > URL: https://svnweb.freebsd.org/changeset/base/308458 > > Log: > Add the DTS for the Netgate SG-1000 (micro-Firewall). > > The SG-1000 boots with GENERIC ARM kernel on -head. > > Obtained from: pfSense > Sponsored by: Rubicon Communications, LLC (Netgate) > > Added: > head/sys/boot/fdt/dts/arm/ubmc.dtsi (contents, props changed) > head/sys/boot/fdt/dts/arm/ufw.dts (contents, props changed) > Modified: > head/sys/modules/dtb/am335x/Makefile Hello Luiz, Two things: - If ubmc.dtsi is gnu licenced it shouldn't go in sys/boot/fdt/dts. It shouldn't go to sys/gnu/dts too as it's not from upstream. - I don't understand why you didn't use the am33xx.dtsi from upstream, it is the way to go for dts. The correct way to add support for this board would be : 1) Create a ubmc.dtsi that uses upstream am33xx.dtsi and submit it upstream (i.e. linux-arm), MIT/GPL dual licence 2) Create a ufw.dts and also submit it upstream (also MIT/GPL) 3) Since those are also MIT you could add them to sys/boot/fdt 4) When we will update the dts from upstream you can then remove them from sys/boot/fdt But there would still be a problem since the am33xx.dtsi is not MIT/GPL licenced. So I guess you don't have any other solution than dealing with DTS somewhere in the pfsense repository (maybe with package or something). The DTS world is already a mess with it's licence and the fact that linux is the "official" place, so please do not add more :) > Added: head/sys/boot/fdt/dts/arm/ubmc.dtsi > ============================================================================== > --- /dev/null 00:00:00 1970 (empty, because file is newly added) > +++ head/sys/boot/fdt/dts/arm/ubmc.dtsi Wed Nov 9 04:07:15 2016 (r308458) > @@ -0,0 +1,315 @@ > +/* > + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * $FreeBSD$ > + */ > + > +/ { > + memory { > + device_type = "memory"; > + reg = <0x80000000 0x10000000>; /* 256 MB */ > + }; > + > + vmmcsd_fixed: fixedregulator@0 { > + compatible = "regulator-fixed"; > + regulator-name = "vmmcsd_fixed"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > +}; > + > +&am33xx_pinmux { > + pinctrl-names = "default"; > + pinctrl-0 = <&clkout2_pin>; > + > + i2c0_pins: pinmux_i2c0_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ > + AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ > + >; > + }; > + > + i2c1_pins: pinmux_i2c1_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda */ > + AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl */ > + >; > + }; > + > + spi0_pins: pinmux_spi0_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_sclk.spi0_sclk */ > + AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_d0.spi0_miso */ > + AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_mosi */ > + AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ > + >; > + }; > + > + spi1_pins: pinmux_spi1_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_col.spi1_sclk */ > + AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_crs.spi1_miso */ > + AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rx_er.spi1_mosi */ > + AM33XX_IOPAD(0x944, PIN_INPUT_PULLUP | MUX_MODE2) /* rmii1_ref_clk.spi1_cs0 */ > + >; > + }; > + > + uart0_pins: pinmux_uart0_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ > + AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ > + >; > + }; > + > + clkout2_pin: pinmux_clkout2_pin { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ > + >; > + }; > + > + cpsw_default: cpsw_default { > + pinctrl-single,pins = < > + /* Slave 1 */ > + AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii_1_txen */ > + AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxdv.rgmii_1_rxdv */ > + AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii_1_txd3 */ > + AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii_1_txd2 */ > + AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii_1_txd1 */ > + AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii_1_txd0 */ > + AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii_1_txclk */ > + AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxclk.rgmii_1_rxclk */ > + AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd3.rgmii_1_rxd3 */ > + AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd2.rgmii_1_rxd2 */ > + AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd1.rgmii_1_rxd1 */ > + AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd0.rgmii_1_rxd0 */ > + > + /* Slave 2 */ > + AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a0.rgmii_2_txen */ > + AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a1.rgmii_2_rxdv */ > + AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a2.rgmii_2_txd3 */ > + AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a3.rgmii_2_txd2 */ > + AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a4.rgmii_2_txd1 */ > + AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a5.rgmii_2_txd0 */ > + AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gmpc_a6.rgmii_2_txclk */ > + AM33XX_IOPAD(0x85c, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a7.rgmii_2_rxclk */ > + AM33XX_IOPAD(0x860, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a8.rgmii_2_rxd3 */ > + AM33XX_IOPAD(0x864, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a9.rgmii_2_rxd2 */ > + AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a10.rgmii_2_rxd1 */ > + AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE2) /* gmpc_a11.rgmii_2_rxd0 */ > + >; > + }; > + > + cpsw_sleep: cpsw_sleep { > + pinctrl-single,pins = < > + /* Slave 1 reset value */ > + AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) > + > + /* Slave 2 reset value */ > + AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7) > + >; > + }; > + > + davinci_mdio_default: davinci_mdio_default { > + pinctrl-single,pins = < > + /* MDIO */ > + AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ > + AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ > + >; > + }; > + > + davinci_mdio_sleep: davinci_mdio_sleep { > + pinctrl-single,pins = < > + /* MDIO reset value */ > + AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) > + AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) > + >; > + }; > + > + mmc1_pins: pinmux_mmc1_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ > + AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ > + AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ > + AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ > + AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ > + AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ > + AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* spi0_cs1.mmc0_cd */ > + >; > + }; > + > + emmc_pins: pinmux_emmc_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp0_fsx.mmc1_cd */ > + AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ > + AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ > + AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ > + AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ > + AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ > + AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ > + AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ > + AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ > + AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ > + AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ > + >; > + }; > + > + ecap0_pins: pinmux_ecap0_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x964, PIN_INPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */ > + >; > + }; > + > + ecap1_pins: pinmux_ecap1_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE2) /* spi0_cs1.ecap1_in_pwm1_out */ > + >; > + }; > + > + ehrpwm1_pins: pinmux_ehrpwm1_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE2) /* lcd_data10.ehrpwm1a */ > + >; > + }; > + > + ecap2_pins: pinmux_ecap2_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x99c, PIN_INPUT | MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */ > + >; > + }; > + > + ehrpwm2_pins: pinmux_ehrpwm2_pins { > + pinctrl-single,pins = < > + AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE3) /* lcd_data0.ehrpwm2a */ > + >; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_pins>; > + > + status = "okay"; > +}; > + > +&usb { > + status = "okay"; > +}; > + > +&usb_ctrl_mod { > + status = "okay"; > +}; > + > +&usb0_phy { > + status = "okay"; > +}; > + > +&usb1_phy { > + status = "okay"; > +}; > + > +&usb0 { > + status = "okay"; > + dr_mode = "host"; > +}; > + > +&usb1 { > + status = "okay"; > + dr_mode = "host"; > +}; > + > +&cppi41dma { > + status = "okay"; > +}; > + > +&i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c0_pins>; > + > + status = "okay"; > + clock-frequency = <400000>; > + > + baseboard_eeprom: baseboard_eeprom@50 { > + compatible = "atmel,24c02"; > + reg = <0x50>; > + > + #address-cells = <1>; > + #size-cells = <1>; > + baseboard_data: baseboard_data@0 { > + reg = <0 0x100>; > + }; > + }; > +}; > + > +&cpsw_emac0 { > + phy_id = <&davinci_mdio>, <1>; > + phy-mode = "rgmii"; > + dual_emac_res_vlan = <1>; > +}; > + > +&cpsw_emac1 { > + phy_id = <&davinci_mdio>, <2>; > + phy-mode = "rgmii"; > + dual_emac_res_vlan = <2>; > +}; > + > +&mac { > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&cpsw_default>; > + pinctrl-1 = <&cpsw_sleep>; > + active_slave = <1>; > + status = "okay"; > + dual_emac; > + txen-skew-ps = <0>; > + rxdv-skew-ps = <1400>; > + rxd0-skew-ps = <1400>; > + rxd1-skew-ps = <1400>; > + rxd2-skew-ps = <1400>; > + rxd3-skew-ps = <1400>; > + txd0-skew-ps = <0>; > + txd1-skew-ps = <0>; > + txd2-skew-ps = <0>; > + txd3-skew-ps = <0>; > + rxc-skew-ps = <4400>; > + txc-skew-ps = <6200>; > +}; > + > +&davinci_mdio { > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&davinci_mdio_default>; > + pinctrl-1 = <&davinci_mdio_sleep>; > + status = "okay"; > +}; > + > +&aes { > + status = "okay"; > +}; > + > +&sham { > + status = "okay"; > +}; > > Added: head/sys/boot/fdt/dts/arm/ufw.dts > ============================================================================== > --- /dev/null 00:00:00 1970 (empty, because file is newly added) > +++ head/sys/boot/fdt/dts/arm/ufw.dts Wed Nov 9 04:07:15 2016 (r308458) > @@ -0,0 +1,70 @@ > +/*- > + * Copyright (c) 2016 Rubicon Communications, LLC (Netgate) > + * All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * 1. Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * 2. Redistributions in binary form must reproduce the above copyright > + * notice, this list of conditions and the following disclaimer in the > + * documentation and/or other materials provided with the distribution. > + * > + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND > + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE > + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE > + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE > + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL > + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS > + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) > + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT > + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY > + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF > + * SUCH DAMAGE. > + * > + * $FreeBSD$ > + */ > + > +/dts-v1/; > + > +#include "am33xx.dtsi" > +#include "ubmc.dtsi" > + > +/ { > + model = "AM335x uFW"; > + compatible = "ti,am335x-ufw", "ti,am335x-ubmc", "ti,am33xx"; > +}; > + > +&mmc1 { > + vmmc-supply = <&vmmcsd_fixed>; > + pinctrl-names = "default"; > + pinctrl-0 = <&mmc1_pins>; > + bus-width = <4>; > + non-removable; > + status = "okay"; > +}; > + > +&mmc2 { > + vmmc-supply = <&vmmcsd_fixed>; > + pinctrl-names = "default"; > + pinctrl-0 = <&emmc_pins>; > + bus-width = <8>; > + ti,dual-volt; > + non-removable; > + status = "okay"; > +}; > + > +&i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c0_pins>; > + > + status = "okay"; > +}; > + > +&i2c1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c1_pins>; > + > + status = "okay"; > +}; > > Modified: head/sys/modules/dtb/am335x/Makefile > ============================================================================== > --- head/sys/modules/dtb/am335x/Makefile Tue Nov 8 23:59:41 2016 (r308457) > +++ head/sys/modules/dtb/am335x/Makefile Wed Nov 9 04:07:15 2016 (r308458) > @@ -2,6 +2,7 @@ > # All the dts files for am335x systems we support. > DTS= \ > beaglebone.dts \ > - beaglebone-black.dts > + beaglebone-black.dts \ > + ufw.dts > > .include -- Emmanuel Vadot