From owner-p4-projects@FreeBSD.ORG Mon Jul 3 12:43:49 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 790A116A416; Mon, 3 Jul 2006 12:43:49 +0000 (UTC) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 1234116A407 for ; Mon, 3 Jul 2006 12:43:49 +0000 (UTC) (envelope-from jb@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id B9F6443D46 for ; Mon, 3 Jul 2006 12:43:48 +0000 (GMT) (envelope-from jb@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k63ChmkO080232 for ; Mon, 3 Jul 2006 12:43:48 GMT (envelope-from jb@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k63ChmCG080226 for perforce@freebsd.org; Mon, 3 Jul 2006 12:43:48 GMT (envelope-from jb@freebsd.org) Date: Mon, 3 Jul 2006 12:43:48 GMT Message-Id: <200607031243.k63ChmCG080226@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to jb@freebsd.org using -f From: John Birrell To: Perforce Change Reviews Cc: Subject: PERFORCE change 100494 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Jul 2006 12:43:49 -0000 http://perforce.freebsd.org/chv.cgi?CH=100494 Change 100494 by jb@jb_freebsd2 on 2006/07/03 12:43:01 Overflowed the cache coherrence size, so increase the value so that this compiles on sparc64 and revisit the issue later. Affected files ... .. //depot/projects/dtrace/src/sys/sys/cpuvar.h#3 edit Differences ... ==== //depot/projects/dtrace/src/sys/sys/cpuvar.h#3 (text+ko) ==== @@ -33,7 +33,7 @@ #include #include -#define CPU_CACHE_COHERENCE_SIZE 64 +#define CPU_CACHE_COHERENCE_SIZE 128 /* * The cpu_core structure consists of per-CPU state available in any context.