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Date:      Wed, 22 Aug 2001 21:53:26 -0700 (PDT)
From:      Luigi Rizzo <rizzo@aciri.org>
To:        imp@harmony.village.org (Warner Losh)
Cc:        phk@critter.freebsd.dk, thierry@herbelot.com, hackers@FreeBSD.ORG, peo@sssup.it
Subject:   Re: clock synchronization quality via NTP ?
Message-ID:  <200108230453.f7N4rQi52619@iguana.aciri.org>
In-Reply-To: <200108230449.f7N4n6W81268@harmony.village.org> from Warner Losh at "Aug 22, 2001 10:49: 6 pm"

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> beyond "normal HVAC" and stock xtals on the motherboard.  This is
> after we've done the fast interrupt hack.  Without it, the other
> system activity was causing enough interrupt latncy variance that we
> would see more like +- 80us with outliers way off in the weeds
> (+- just under 10ms!).

Warner, this sounds related to a problem we are having...

a student of mine is seeing sporadic but relatively large (~50-100us) variations
in the period of clock interrupts (int0 calls to the assembly
routine). This is in the assembler part of the interrupt
service routine, so the only reason I can see for these
variations is that there are some significantly large sections
of code (this is a 750 MHz box) which run with interrupts
disable on the CPU.

Is this the case ? And if so, what is the "fast interrupt hack" that you
are mentioning and how would it improve things ?

	thanks
	luigi

----------------------------------+-----------------------------------------
 Luigi RIZZO, luigi@iet.unipi.it  . ACIRI/ICSI (on leave from Univ. di Pisa)
 http://www.iet.unipi.it/~luigi/  . 1947 Center St, Berkeley CA 94704
 Phone: (510) 666 2927
----------------------------------+-----------------------------------------

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