From owner-p4-projects@FreeBSD.ORG Tue Jun 15 09:50:15 2004 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 984C516A4CF; Tue, 15 Jun 2004 09:50:15 +0000 (GMT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 6B20816A4CF for ; Tue, 15 Jun 2004 09:50:15 +0000 (GMT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6617C43D41 for ; Tue, 15 Jun 2004 09:50:15 +0000 (GMT) (envelope-from jmallett@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.11/8.12.11) with ESMTP id i5F9nd2L009164 for ; Tue, 15 Jun 2004 09:49:39 GMT (envelope-from jmallett@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.11/8.12.11/Submit) id i5F9ncpu009161 for perforce@freebsd.org; Tue, 15 Jun 2004 09:49:38 GMT (envelope-from jmallett@freebsd.org) Date: Tue, 15 Jun 2004 09:49:38 GMT Message-Id: <200406150949.i5F9ncpu009161@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to jmallett@freebsd.org using -f From: Juli Mallett To: Perforce Change Reviews Subject: PERFORCE change 55001 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Jun 2004 09:50:16 -0000 http://perforce.freebsd.org/chv.cgi?CH=55001 Change 55001 by jmallett@jmallett_oingo on 2004/06/15 09:48:44 LOVE MUMMY! Er, I mean, CURSE! Flush the cache in the right lock step with setting up exception vectors, otherwise on teh Indigo2, at least, I get badness with our exception vectors not being used. Quirky. Affected files ... .. //depot/projects/mips/sys/mips/mips/cpu.c#2 edit Differences ... ==== //depot/projects/mips/sys/mips/mips/cpu.c#2 (text+ko) ==== @@ -163,9 +163,9 @@ mips_config_cache(); tlb_invalidate_all(); + mips_vector_init(); mips_icache_sync_all(); mips_dcache_wbinv_all(); - mips_vector_init(); } void