From owner-svn-src-stable@FreeBSD.ORG Thu Feb 28 05:41:14 2013 Return-Path: Delivered-To: svn-src-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 88BE0C94; Thu, 28 Feb 2013 05:41:14 +0000 (UTC) (envelope-from jfvogel@gmail.com) Received: from mail-vc0-f179.google.com (mail-vc0-f179.google.com [209.85.220.179]) by mx1.freebsd.org (Postfix) with ESMTP id AC645C12; Thu, 28 Feb 2013 05:41:13 +0000 (UTC) Received: by mail-vc0-f179.google.com with SMTP id k1so932094vck.38 for ; Wed, 27 Feb 2013 21:41:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:x-received:in-reply-to:references:date:message-id :subject:from:to:cc:content-type; bh=6MvJGkOilA1JGT1vPQkdYeWy6wImDTQV0mxEdEjmLbQ=; b=c9lZ7DRRo6tVjveS8JWQW2GwYQqyynQ1nPzX7VjWY0ygTDHw+jLiUGgeL7SLS9oN6t /tUpGvWW9T3F2r3PUhB6AweErMXiO10bSkdFnehL3Vub0BzBYtyk8rWnpQ/4mirCBrHH Qm9mCEmDIWkKOUm9dncdoOW27jEMIDubfzR9rL265YvpYk4kHtf1iGrevKG2NvuEvjae Mrs4KBMAJKTiGwPHfv/M/WDbG3O0ith4nsXwpTyH54yDZuR5Xc/4qHiEUmUavRg2uavX HUmrtUobbNsEe1y8t3wlt4x1KXitoTQYzCsdYidKNkWisdfa/XLPUuJXftOlB/oYMwbu tKPQ== MIME-Version: 1.0 X-Received: by 10.52.30.48 with SMTP id p16mr1779773vdh.118.1362030066832; Wed, 27 Feb 2013 21:41:06 -0800 (PST) Received: by 10.220.191.132 with HTTP; Wed, 27 Feb 2013 21:41:06 -0800 (PST) In-Reply-To: References: <201302280022.r1S0M4vm064514@svn.freebsd.org> <20130228022333.GC70215@glenbarber.us> Date: Wed, 27 Feb 2013 21:41:06 -0800 Message-ID: Subject: Re: svn commit: r247430 - in stable/8/sys: conf dev/e1000 modules/em modules/igb From: Jack Vogel To: Glen Barber Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: Jack F Vogel , svn-src-stable@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org, svn-src-stable-8@freebsd.org X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 28 Feb 2013 05:41:14 -0000 LOL, I would see the messages just as I sent this, never mind. Jack On Wed, Feb 27, 2013 at 9:39 PM, Jack Vogel wrote: > Oh, that's odd, then HEAD should be broken too, do you have more detail? > > Jack > > > On Wed, Feb 27, 2013 at 6:23 PM, Glen Barber wrote: > >> Jack, >> >> This commit seems to break the build for at least powerpc and sparc64. >> >> Glen >> >> On Thu, Feb 28, 2013 at 12:22:04AM +0000, Jack F Vogel wrote: >> > Author: jfv >> > Date: Thu Feb 28 00:22:04 2013 >> > New Revision: 247430 >> > URL: http://svnweb.freebsd.org/changeset/base/247430 >> > >> > Log: >> > MFC of the E1000 drivers to STABLE/8, this includes the follow >> revisions >> > plus a few tweaks: >> > 196969,196970,211516,214646,215781,215789,215808,215910,223350, >> > 223482,223831,228281,228393,229939,231796,232238,234665,235256, >> > 236406,238148,238151,238214,238765,238770,238953,238981,239105, >> > 239109,239304,240518,240693,240968,241037,241856,241885,243570, >> > 243857,245334,246128,246482,247064 >> > >> > Added: >> > stable/8/sys/dev/e1000/e1000_i210.c >> > - copied, changed from r238148, head/sys/dev/e1000/e1000_i210.c >> > stable/8/sys/dev/e1000/e1000_i210.h >> > - copied, changed from r238148, head/sys/dev/e1000/e1000_i210.h >> > Modified: >> > stable/8/sys/conf/files >> > stable/8/sys/dev/e1000/e1000_82541.c >> > stable/8/sys/dev/e1000/e1000_82543.c >> > stable/8/sys/dev/e1000/e1000_82571.c >> > stable/8/sys/dev/e1000/e1000_82575.c >> > stable/8/sys/dev/e1000/e1000_82575.h >> > stable/8/sys/dev/e1000/e1000_api.c >> > stable/8/sys/dev/e1000/e1000_api.h >> > stable/8/sys/dev/e1000/e1000_defines.h >> > stable/8/sys/dev/e1000/e1000_hw.h >> > stable/8/sys/dev/e1000/e1000_ich8lan.c >> > stable/8/sys/dev/e1000/e1000_ich8lan.h >> > stable/8/sys/dev/e1000/e1000_mac.c >> > stable/8/sys/dev/e1000/e1000_mac.h >> > stable/8/sys/dev/e1000/e1000_manage.c >> > stable/8/sys/dev/e1000/e1000_manage.h >> > stable/8/sys/dev/e1000/e1000_nvm.c >> > stable/8/sys/dev/e1000/e1000_nvm.h >> > stable/8/sys/dev/e1000/e1000_osdep.h >> > stable/8/sys/dev/e1000/e1000_phy.c >> > stable/8/sys/dev/e1000/e1000_phy.h >> > stable/8/sys/dev/e1000/e1000_regs.h >> > stable/8/sys/dev/e1000/if_em.c (contents, props changed) >> > stable/8/sys/dev/e1000/if_igb.c (contents, props changed) >> > stable/8/sys/dev/e1000/if_igb.h >> > stable/8/sys/dev/e1000/if_lem.c >> > stable/8/sys/modules/em/Makefile >> > stable/8/sys/modules/igb/Makefile >> > Directory Properties: >> > stable/8/sys/dev/e1000/ (props changed) >> > >> > Modified: stable/8/sys/conf/files >> > >> ============================================================================== >> > --- stable/8/sys/conf/files Thu Feb 28 00:18:56 2013 (r247429) >> > +++ stable/8/sys/conf/files Thu Feb 28 00:22:04 2013 (r247430) >> > @@ -920,6 +920,8 @@ dev/e1000/e1000_82575.c optional em | i >> > compile-with "${NORMAL_C} -I$S/dev/e1000" >> > dev/e1000/e1000_ich8lan.c optional em | igb \ >> > compile-with "${NORMAL_C} -I$S/dev/e1000" >> > +dev/e1000/e1000_i210.c optional em | igb \ >> > + compile-with "${NORMAL_C} -I$S/dev/e1000" >> > dev/e1000/e1000_api.c optional em | igb \ >> > compile-with "${NORMAL_C} -I$S/dev/e1000" >> > dev/e1000/e1000_mac.c optional em | igb \ >> > >> > Modified: stable/8/sys/dev/e1000/e1000_82541.c >> > >> ============================================================================== >> > --- stable/8/sys/dev/e1000/e1000_82541.c Thu Feb 28 00:18:56 2013 >> (r247429) >> > +++ stable/8/sys/dev/e1000/e1000_82541.c Thu Feb 28 00:22:04 2013 >> (r247430) >> > @@ -642,7 +642,7 @@ static s32 e1000_check_for_link_82541(st >> > * of MAC speed/duplex configuration. So we only need to >> > * configure Collision Distance in the MAC. >> > */ >> > - e1000_config_collision_dist_generic(hw); >> > + mac->ops.config_collision_dist(hw); >> > >> > /* >> > * Configure Flow Control now that Auto-Neg has completed. >> > >> > Modified: stable/8/sys/dev/e1000/e1000_82543.c >> > >> ============================================================================== >> > --- stable/8/sys/dev/e1000/e1000_82543.c Thu Feb 28 00:18:56 2013 >> (r247429) >> > +++ stable/8/sys/dev/e1000/e1000_82543.c Thu Feb 28 00:22:04 2013 >> (r247430) >> > @@ -1126,7 +1126,7 @@ static s32 e1000_setup_copper_link_82543 >> > DEBUGOUT("Valid link established!!!\n"); >> > /* Config the MAC and PHY after link is up */ >> > if (hw->mac.type == e1000_82544) { >> > - e1000_config_collision_dist_generic(hw); >> > + hw->mac.ops.config_collision_dist(hw); >> > } else { >> > ret_val = e1000_config_mac_to_phy_82543(hw); >> > if (ret_val) >> > @@ -1160,7 +1160,7 @@ static s32 e1000_setup_fiber_link_82543( >> > /* Take the link out of reset */ >> > ctrl &= ~E1000_CTRL_LRST; >> > >> > - e1000_config_collision_dist_generic(hw); >> > + hw->mac.ops.config_collision_dist(hw); >> > >> > ret_val = e1000_commit_fc_settings_generic(hw); >> > if (ret_val) >> > @@ -1259,7 +1259,7 @@ static s32 e1000_check_for_copper_link_8 >> > * settings. >> > */ >> > if (mac->type == e1000_82544) >> > - e1000_config_collision_dist_generic(hw); >> > + hw->mac.ops.config_collision_dist(hw); >> > else { >> > ret_val = e1000_config_mac_to_phy_82543(hw); >> > if (ret_val) { >> > @@ -1433,7 +1433,7 @@ static s32 e1000_config_mac_to_phy_82543 >> > if (phy_data & M88E1000_PSSR_DPLX) >> > ctrl |= E1000_CTRL_FD; >> > >> > - e1000_config_collision_dist_generic(hw); >> > + hw->mac.ops.config_collision_dist(hw); >> > >> > /* >> > * Set up speed in the Device Control register depending on >> > >> > Modified: stable/8/sys/dev/e1000/e1000_82571.c >> > >> ============================================================================== >> > --- stable/8/sys/dev/e1000/e1000_82571.c Thu Feb 28 00:18:56 2013 >> (r247429) >> > +++ stable/8/sys/dev/e1000/e1000_82571.c Thu Feb 28 00:22:04 2013 >> (r247430) >> > @@ -1,6 +1,6 @@ >> > >> /****************************************************************************** >> > >> > - Copyright (c) 2001-2011, Intel Corporation >> > + Copyright (c) 2001-2013, Intel Corporation >> > All rights reserved. >> > >> > Redistribution and use in source and binary forms, with or without >> > @@ -32,8 +32,7 @@ >> > >> ******************************************************************************/ >> > /*$FreeBSD$*/ >> > >> > -/* >> > - * 82571EB Gigabit Ethernet Controller >> > +/* 82571EB Gigabit Ethernet Controller >> > * 82571EB Gigabit Ethernet Controller (Copper) >> > * 82571EB Gigabit Ethernet Controller (Fiber) >> > * 82571EB Dual Port Gigabit Mezzanine Adapter >> > @@ -51,9 +50,6 @@ >> > >> > #include "e1000_api.h" >> > >> > -static s32 e1000_init_phy_params_82571(struct e1000_hw *hw); >> > -static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw); >> > -static s32 e1000_init_mac_params_82571(struct e1000_hw *hw); >> > static s32 e1000_acquire_nvm_82571(struct e1000_hw *hw); >> > static void e1000_release_nvm_82571(struct e1000_hw *hw); >> > static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, >> > @@ -78,7 +74,6 @@ static s32 e1000_get_hw_semaphore_82571 >> > static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw); >> > static s32 e1000_get_phy_id_82571(struct e1000_hw *hw); >> > static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw); >> > -static s32 e1000_get_hw_semaphore_82573(struct e1000_hw *hw); >> > static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw); >> > static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw); >> > static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw); >> > @@ -99,13 +94,13 @@ static void e1000_power_down_phy_copper_ >> > static s32 e1000_init_phy_params_82571(struct e1000_hw *hw) >> > { >> > struct e1000_phy_info *phy = &hw->phy; >> > - s32 ret_val = E1000_SUCCESS; >> > + s32 ret_val; >> > >> > DEBUGFUNC("e1000_init_phy_params_82571"); >> > >> > if (hw->phy.media_type != e1000_media_type_copper) { >> > phy->type = e1000_phy_none; >> > - goto out; >> > + return E1000_SUCCESS; >> > } >> > >> > phy->addr = 1; >> > @@ -165,8 +160,7 @@ static s32 e1000_init_phy_params_82571(s >> > phy->ops.set_d3_lplu_state = >> e1000_set_d3_lplu_state_82574; >> > break; >> > default: >> > - ret_val = -E1000_ERR_PHY; >> > - goto out; >> > + return -E1000_ERR_PHY; >> > break; >> > } >> > >> > @@ -174,7 +168,7 @@ static s32 e1000_init_phy_params_82571(s >> > ret_val = e1000_get_phy_id_82571(hw); >> > if (ret_val) { >> > DEBUGOUT("Error getting PHY ID\n"); >> > - goto out; >> > + return ret_val; >> > } >> > >> > /* Verify phy id */ >> > @@ -201,7 +195,6 @@ static s32 e1000_init_phy_params_82571(s >> > if (ret_val) >> > DEBUGOUT1("PHY ID unknown: type = 0x%08x\n", phy->id); >> > >> > -out: >> > return ret_val; >> > } >> > >> > @@ -241,8 +234,7 @@ static s32 e1000_init_nvm_params_82571(s >> > if (((eecd >> 15) & 0x3) == 0x3) { >> > nvm->type = e1000_nvm_flash_hw; >> > nvm->word_size = 2048; >> > - /* >> > - * Autonomous Flash update bit must be cleared due >> > + /* Autonomous Flash update bit must be cleared due >> > * to Flash update issue. >> > */ >> > eecd &= ~E1000_EECD_AUPDEN; >> > @@ -254,8 +246,7 @@ static s32 e1000_init_nvm_params_82571(s >> > nvm->type = e1000_nvm_eeprom_spi; >> > size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >> >> > E1000_EECD_SIZE_EX_SHIFT); >> > - /* >> > - * Added to a constant, "size" becomes the left-shift >> value >> > + /* Added to a constant, "size" becomes the left-shift >> value >> > * for setting word_size. >> > */ >> > size += NVM_WORD_SIZE_BASE_SHIFT; >> > @@ -382,12 +373,11 @@ static s32 e1000_init_mac_params_82571(s >> > >> > /* FWSM register */ >> > mac->has_fwsm = TRUE; >> > - /* >> > - * ARC supported; valid only if manageability features are >> > + /* ARC supported; valid only if manageability features are >> > * enabled. >> > */ >> > - mac->arc_subsystem_valid = (E1000_READ_REG(hw, >> E1000_FWSM) & >> > - E1000_FWSM_MODE_MASK) ? TRUE : >> FALSE; >> > + mac->arc_subsystem_valid = !!(E1000_READ_REG(hw, >> E1000_FWSM) & >> > + E1000_FWSM_MODE_MASK); >> > break; >> > case e1000_82574: >> > case e1000_82583: >> > @@ -405,8 +395,7 @@ static s32 e1000_init_mac_params_82571(s >> > break; >> > } >> > >> > - /* >> > - * Ensure that the inter-port SWSM.SMBI lock bit is clear before >> > + /* Ensure that the inter-port SWSM.SMBI lock bit is clear before >> > * first NVM or PHY acess. This should be done for single-port >> > * devices, and for one port only on dual-port devices so that >> > * for those devices we can still use the SMBI lock to synchronize >> > @@ -422,8 +411,9 @@ static s32 e1000_init_mac_params_82571(s >> > E1000_WRITE_REG(hw, E1000_SWSM2, swsm2 | >> > E1000_SWSM2_LOCK); >> > force_clear_smbi = TRUE; >> > - } else >> > + } else { >> > force_clear_smbi = FALSE; >> > + } >> > break; >> > default: >> > force_clear_smbi = TRUE; >> > @@ -443,10 +433,7 @@ static s32 e1000_init_mac_params_82571(s >> > E1000_WRITE_REG(hw, E1000_SWSM, swsm & ~E1000_SWSM_SMBI); >> > } >> > >> > - /* >> > - * Initialze device specific counter of SMBI acquisition >> > - * timeouts. >> > - */ >> > + /* Initialze device specific counter of SMBI acquisition >> timeouts. */ >> > hw->dev_spec._82571.smb_counter = 0; >> > >> > return E1000_SUCCESS; >> > @@ -477,7 +464,7 @@ void e1000_init_function_pointers_82571( >> > static s32 e1000_get_phy_id_82571(struct e1000_hw *hw) >> > { >> > struct e1000_phy_info *phy = &hw->phy; >> > - s32 ret_val = E1000_SUCCESS; >> > + s32 ret_val; >> > u16 phy_id = 0; >> > >> > DEBUGFUNC("e1000_get_phy_id_82571"); >> > @@ -485,8 +472,7 @@ static s32 e1000_get_phy_id_82571(struct >> > switch (hw->mac.type) { >> > case e1000_82571: >> > case e1000_82572: >> > - /* >> > - * The 82571 firmware may still be configuring the PHY. >> > + /* The 82571 firmware may still be configuring the PHY. >> > * In this case, we cannot access the PHY until the >> > * configuration is done. So we explicitly set the >> > * PHY ID. >> > @@ -494,29 +480,29 @@ static s32 e1000_get_phy_id_82571(struct >> > phy->id = IGP01E1000_I_PHY_ID; >> > break; >> > case e1000_82573: >> > - ret_val = e1000_get_phy_id(hw); >> > + return e1000_get_phy_id(hw); >> > break; >> > case e1000_82574: >> > case e1000_82583: >> > ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > >> > phy->id = (u32)(phy_id << 16); >> > usec_delay(20); >> > ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > >> > phy->id |= (u32)(phy_id); >> > phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); >> > break; >> > default: >> > - ret_val = -E1000_ERR_PHY; >> > + return -E1000_ERR_PHY; >> > break; >> > } >> > -out: >> > - return ret_val; >> > + >> > + return E1000_SUCCESS; >> > } >> > >> > /** >> > @@ -528,15 +514,13 @@ out: >> > static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw) >> > { >> > u32 swsm; >> > - s32 ret_val = E1000_SUCCESS; >> > s32 sw_timeout = hw->nvm.word_size + 1; >> > s32 fw_timeout = hw->nvm.word_size + 1; >> > s32 i = 0; >> > >> > DEBUGFUNC("e1000_get_hw_semaphore_82571"); >> > >> > - /* >> > - * If we have timedout 3 times on trying to acquire >> > + /* If we have timedout 3 times on trying to acquire >> > * the inter-port SMBI semaphore, there is old code >> > * operating on the other port, and it is not >> > * releasing SMBI. Modify the number of times that >> > @@ -576,12 +560,10 @@ static s32 e1000_get_hw_semaphore_82571( >> > /* Release semaphores */ >> > e1000_put_hw_semaphore_82571(hw); >> > DEBUGOUT("Driver can't access the NVM\n"); >> > - ret_val = -E1000_ERR_NVM; >> > - goto out; >> > + return -E1000_ERR_NVM; >> > } >> > >> > -out: >> > - return ret_val; >> > + return E1000_SUCCESS; >> > } >> > >> > /** >> > @@ -613,22 +595,19 @@ static void e1000_put_hw_semaphore_82571 >> > static s32 e1000_get_hw_semaphore_82573(struct e1000_hw *hw) >> > { >> > u32 extcnf_ctrl; >> > - s32 ret_val = E1000_SUCCESS; >> > s32 i = 0; >> > >> > DEBUGFUNC("e1000_get_hw_semaphore_82573"); >> > >> > extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); >> > - extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP; >> > do { >> > + extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP; >> > E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl); >> > extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL); >> > >> > if (extcnf_ctrl & E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP) >> > break; >> > >> > - extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP; >> > - >> > msec_delay(2); >> > i++; >> > } while (i < MDIO_OWNERSHIP_TIMEOUT); >> > @@ -637,12 +616,10 @@ static s32 e1000_get_hw_semaphore_82573( >> > /* Release semaphores */ >> > e1000_put_hw_semaphore_82573(hw); >> > DEBUGOUT("Driver can't access the PHY\n"); >> > - ret_val = -E1000_ERR_PHY; >> > - goto out; >> > + return -E1000_ERR_PHY; >> > } >> > >> > -out: >> > - return ret_val; >> > + return E1000_SUCCESS; >> > } >> > >> > /** >> > @@ -712,7 +689,7 @@ static void e1000_put_hw_semaphore_82574 >> > **/ >> > static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool >> active) >> > { >> > - u16 data = E1000_READ_REG(hw, E1000_POEMB); >> > + u32 data = E1000_READ_REG(hw, E1000_POEMB); >> > >> > DEBUGFUNC("e1000_set_d0_lplu_state_82574"); >> > >> > @@ -738,7 +715,7 @@ static s32 e1000_set_d0_lplu_state_82574 >> > **/ >> > static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool >> active) >> > { >> > - u16 data = E1000_READ_REG(hw, E1000_POEMB); >> > + u32 data = E1000_READ_REG(hw, E1000_POEMB); >> > >> > DEBUGFUNC("e1000_set_d3_lplu_state_82574"); >> > >> > @@ -771,7 +748,7 @@ static s32 e1000_acquire_nvm_82571(struc >> > >> > ret_val = e1000_get_hw_semaphore_82571(hw); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > >> > switch (hw->mac.type) { >> > case e1000_82573: >> > @@ -784,7 +761,6 @@ static s32 e1000_acquire_nvm_82571(struc >> > if (ret_val) >> > e1000_put_hw_semaphore_82571(hw); >> > >> > -out: >> > return ret_val; >> > } >> > >> > @@ -817,7 +793,7 @@ static void e1000_release_nvm_82571(stru >> > static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 >> words, >> > u16 *data) >> > { >> > - s32 ret_val = E1000_SUCCESS; >> > + s32 ret_val; >> > >> > DEBUGFUNC("e1000_write_nvm_82571"); >> > >> > @@ -857,31 +833,27 @@ static s32 e1000_update_nvm_checksum_825 >> > >> > ret_val = e1000_update_nvm_checksum_generic(hw); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > >> > - /* >> > - * If our nvm is an EEPROM, then we're done >> > + /* If our nvm is an EEPROM, then we're done >> > * otherwise, commit the checksum to the flash NVM. >> > */ >> > if (hw->nvm.type != e1000_nvm_flash_hw) >> > - goto out; >> > + return E1000_SUCCESS; >> > >> > /* Check for pending operations. */ >> > for (i = 0; i < E1000_FLASH_UPDATES; i++) { >> > msec_delay(1); >> > - if ((E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD) >> == 0) >> > + if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD)) >> > break; >> > } >> > >> > - if (i == E1000_FLASH_UPDATES) { >> > - ret_val = -E1000_ERR_NVM; >> > - goto out; >> > - } >> > + if (i == E1000_FLASH_UPDATES) >> > + return -E1000_ERR_NVM; >> > >> > /* Reset the firmware if using STM opcode. */ >> > if ((E1000_READ_REG(hw, E1000_FLOP) & 0xFF00) == >> E1000_STM_OPCODE) { >> > - /* >> > - * The enabling of and the actual reset must be done >> > + /* The enabling of and the actual reset must be done >> > * in two write cycles. >> > */ >> > E1000_WRITE_REG(hw, E1000_HICR, >> E1000_HICR_FW_RESET_ENABLE); >> > @@ -895,17 +867,14 @@ static s32 e1000_update_nvm_checksum_825 >> > >> > for (i = 0; i < E1000_FLASH_UPDATES; i++) { >> > msec_delay(1); >> > - if ((E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD) >> == 0) >> > + if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD)) >> > break; >> > } >> > >> > - if (i == E1000_FLASH_UPDATES) { >> > - ret_val = -E1000_ERR_NVM; >> > - goto out; >> > - } >> > + if (i == E1000_FLASH_UPDATES) >> > + return -E1000_ERR_NVM; >> > >> > -out: >> > - return ret_val; >> > + return E1000_SUCCESS; >> > } >> > >> > /** >> > @@ -944,19 +913,17 @@ static s32 e1000_write_nvm_eewr_82571(st >> > { >> > struct e1000_nvm_info *nvm = &hw->nvm; >> > u32 i, eewr = 0; >> > - s32 ret_val = 0; >> > + s32 ret_val = E1000_SUCCESS; >> > >> > DEBUGFUNC("e1000_write_nvm_eewr_82571"); >> > >> > - /* >> > - * A check for invalid values: offset too large, too many words, >> > + /* A check for invalid values: offset too large, too many words, >> > * and not enough words. >> > */ >> > if ((offset >= nvm->word_size) || (words > (nvm->word_size - >> offset)) || >> > (words == 0)) { >> > DEBUGOUT("nvm parameter(s) out of bounds\n"); >> > - ret_val = -E1000_ERR_NVM; >> > - goto out; >> > + return -E1000_ERR_NVM; >> > } >> > >> > for (i = 0; i < words; i++) { >> > @@ -975,7 +942,6 @@ static s32 e1000_write_nvm_eewr_82571(st >> > break; >> > } >> > >> > -out: >> > return ret_val; >> > } >> > >> > @@ -988,7 +954,6 @@ out: >> > static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw) >> > { >> > s32 timeout = PHY_CFG_TIMEOUT; >> > - s32 ret_val = E1000_SUCCESS; >> > >> > DEBUGFUNC("e1000_get_cfg_done_82571"); >> > >> > @@ -1001,12 +966,10 @@ static s32 e1000_get_cfg_done_82571(stru >> > } >> > if (!timeout) { >> > DEBUGOUT("MNG configuration cycle has not completed.\n"); >> > - ret_val = -E1000_ERR_RESET; >> > - goto out; >> > + return -E1000_ERR_RESET; >> > } >> > >> > -out: >> > - return ret_val; >> > + return E1000_SUCCESS; >> > } >> > >> > /** >> > @@ -1023,39 +986,40 @@ out: >> > static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool >> active) >> > { >> > struct e1000_phy_info *phy = &hw->phy; >> > - s32 ret_val = E1000_SUCCESS; >> > + s32 ret_val; >> > u16 data; >> > >> > DEBUGFUNC("e1000_set_d0_lplu_state_82571"); >> > >> > if (!(phy->ops.read_reg)) >> > - goto out; >> > + return E1000_SUCCESS; >> > >> > ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > >> > if (active) { >> > data |= IGP02E1000_PM_D0_LPLU; >> > ret_val = phy->ops.write_reg(hw, >> IGP02E1000_PHY_POWER_MGMT, >> > data); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > >> > /* When LPLU is enabled, we should disable SmartSpeed */ >> > ret_val = phy->ops.read_reg(hw, >> IGP01E1000_PHY_PORT_CONFIG, >> > &data); >> > + if (ret_val) >> > + return ret_val; >> > data &= ~IGP01E1000_PSCFR_SMART_SPEED; >> > ret_val = phy->ops.write_reg(hw, >> IGP01E1000_PHY_PORT_CONFIG, >> > data); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > } else { >> > data &= ~IGP02E1000_PM_D0_LPLU; >> > ret_val = phy->ops.write_reg(hw, >> IGP02E1000_PHY_POWER_MGMT, >> > data); >> > - /* >> > - * LPLU and SmartSpeed are mutually exclusive. LPLU is >> used >> > + /* LPLU and SmartSpeed are mutually exclusive. LPLU is >> used >> > * during Dx states where the power conservation is most >> > * important. During driver activity we should enable >> > * SmartSpeed, so performance is maintained. >> > @@ -1065,32 +1029,31 @@ static s32 e1000_set_d0_lplu_state_82571 >> > >> IGP01E1000_PHY_PORT_CONFIG, >> > &data); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > >> > data |= IGP01E1000_PSCFR_SMART_SPEED; >> > ret_val = phy->ops.write_reg(hw, >> > >> IGP01E1000_PHY_PORT_CONFIG, >> > data); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > } else if (phy->smart_speed == e1000_smart_speed_off) { >> > ret_val = phy->ops.read_reg(hw, >> > >> IGP01E1000_PHY_PORT_CONFIG, >> > &data); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > >> > data &= ~IGP01E1000_PSCFR_SMART_SPEED; >> > ret_val = phy->ops.write_reg(hw, >> > >> IGP01E1000_PHY_PORT_CONFIG, >> > data); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > } >> > } >> > >> > -out: >> > - return ret_val; >> > + return E1000_SUCCESS; >> > } >> > >> > /** >> > @@ -1101,13 +1064,12 @@ out: >> > **/ >> > static s32 e1000_reset_hw_82571(struct e1000_hw *hw) >> > { >> > - u32 ctrl, ctrl_ext; >> > + u32 ctrl, ctrl_ext, eecd, tctl; >> > s32 ret_val; >> > >> > DEBUGFUNC("e1000_reset_hw_82571"); >> > >> > - /* >> > - * Prevent the PCI-E bus from sticking if there is no TLP >> connection >> > + /* Prevent the PCI-E bus from sticking if there is no TLP >> connection >> > * on the last TLP read/write transaction when MAC is reset. >> > */ >> > ret_val = e1000_disable_pcie_master_generic(hw); >> > @@ -1118,13 +1080,14 @@ static s32 e1000_reset_hw_82571(struct e >> > E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); >> > >> > E1000_WRITE_REG(hw, E1000_RCTL, 0); >> > - E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP); >> > + tctl = E1000_READ_REG(hw, E1000_TCTL); >> > + tctl &= ~E1000_TCTL_EN; >> > + E1000_WRITE_REG(hw, E1000_TCTL, tctl); >> > E1000_WRITE_FLUSH(hw); >> > >> > msec_delay(10); >> > >> > - /* >> > - * Must acquire the MDIO ownership before MAC reset. >> > + /* Must acquire the MDIO ownership before MAC reset. >> > * Ownership defaults to firmware after a reset. >> > */ >> > switch (hw->mac.type) { >> > @@ -1167,15 +1130,23 @@ static s32 e1000_reset_hw_82571(struct e >> > ret_val = e1000_get_auto_rd_done_generic(hw); >> > if (ret_val) >> > /* We don't want to continue accessing MAC registers. */ >> > - goto out; >> > + return ret_val; >> > >> > - /* >> > - * Phy configuration from NVM just starts after EECD_AUTO_RD is >> set. >> > + /* Phy configuration from NVM just starts after EECD_AUTO_RD is >> set. >> > * Need to wait for Phy configuration completion before accessing >> > * NVM and Phy. >> > */ >> > >> > switch (hw->mac.type) { >> > + case e1000_82571: >> > + case e1000_82572: >> > + /* REQ and GNT bits need to be cleared when using AUTO_RD >> > + * to access the EEPROM. >> > + */ >> > + eecd = E1000_READ_REG(hw, E1000_EECD); >> > + eecd &= ~(E1000_EECD_REQ | E1000_EECD_GNT); >> > + E1000_WRITE_REG(hw, E1000_EECD, eecd); >> > + break; >> > case e1000_82573: >> > case e1000_82574: >> > case e1000_82583: >> > @@ -1193,7 +1164,7 @@ static s32 e1000_reset_hw_82571(struct e >> > /* Install any alternate MAC address into RAR0 */ >> > ret_val = e1000_check_alt_mac_addr_generic(hw); >> > if (ret_val) >> > - goto out; >> > + return ret_val; >> > >> > e1000_set_laa_state_82571(hw, TRUE); >> > } >> > @@ -1202,8 +1173,7 @@ static s32 e1000_reset_hw_82571(struct e >> > if (hw->phy.media_type == e1000_media_type_internal_serdes) >> > hw->mac.serdes_link_state = e1000_serdes_link_down; >> > >> > -out: >> > - return ret_val; >> > + return E1000_SUCCESS; >> > } >> > >> > /** >> > @@ -1225,16 +1195,15 @@ static s32 e1000_init_hw_82571(struct e1 >> > >> > /* Initialize identification LED */ >> > ret_val = mac->ops.id_led_init(hw); >> > + /* An error is not fatal and we should not stop init due to this >> */ >> > if (ret_val) >> > DEBUGOUT("Error initializing identification LED\n"); >> > - /* This is not fatal and we should not stop init due to >> this */ >> > >> > /* Disabling VLAN filtering */ >> > DEBUGOUT("Initializing the IEEE VLAN\n"); >> > mac->ops.clear_vfta(hw); >> > >> > - /* Setup the receive address. */ >> > - /* >> > + /* Setup the receive address. >> > * If, however, a locally administered address was assigned to the >> > * 82571, we must reserve a RAR for it to work around an issue >> where >> > * resetting one port will reload the MAC on the other port. >> > @@ -1277,8 +1246,7 @@ static s32 e1000_init_hw_82571(struct e1 >> > break; >> > } >> > >> > - /* >> > - * Clear all of the statistics registers (clear on read). It is >> > + /* Clear all of the statistics registers (clear on read). It is >> > * important that we do this after we have tried to establish link >> > * because the symbol error count will increment wildly if there >> > * is no link. >> > @@ -1377,8 +1345,7 @@ static void e1000_initialize_hw_bits_825 >> > E1000_WRITE_REG(hw, E1000_PBA_ECC, reg); >> > } >> > >> > - /* >> > - * Workaround for hardware errata. >> > + /* Workaround for hardware errata. >> > * Ensure that DMA Dynamic Clock gating is disabled on 82571 and >> 82572 >> > */ >> > if ((hw->mac.type == e1000_82571) || >> > @@ -1388,6 +1355,15 @@ static void e1000_initialize_hw_bits_825 >> > E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg); >> > } >> > >> > + /* Disable IPv6 extension header parsing because some malformed >> > + * IPv6 headers can hang the Rx. >> > + */ >> > + if (hw->mac.type <= e1000_82573) { >> > + reg = E1000_READ_REG(hw, E1000_RFCTL); >> > + reg |= (E1000_RFCTL_IPV6_EX_DIS | >> E1000_RFCTL_NEW_IPV6_EXT_DIS); >> > + E1000_WRITE_REG(hw, E1000_RFCTL, reg); >> > + } >> > + >> > /* PCI-Ex Control Registers */ >> > switch (hw->mac.type) { >> > case e1000_82574: >> > @@ -1396,8 +1372,7 @@ static void e1000_initialize_hw_bits_825 >> > reg |= (1 << 22); >> > E1000_WRITE_REG(hw, E1000_GCR, reg); >> > >> > - /* >> > - * Workaround for hardware errata. >> > + /* Workaround for hardware errata. >> > * apply workaround for hardware errata documented in >> errata >> > * docs Fixes issue where some error prone or unreliable >> PCIe >> > * completions are occurring, particularly with ASPM >> enabled. >> > @@ -1435,25 +1410,25 @@ static void e1000_clear_vfta_82571(struc >> > case e1000_82574: >> > case e1000_82583: >> > if (hw->mng_cookie.vlan_id != 0) { >> > - /* >> > - * The VFTA is a 4096b bit-field, each identifying >> > + /* The VFTA is a 4096b bit-field, each identifying >> > * a single VLAN ID. The following operations >> > * determine which 32b entry (i.e. offset) into >> the >> > * array we want to set the VLAN ID (i.e. bit) of >> > * the manageability unit. >> > */ >> > vfta_offset = (hw->mng_cookie.vlan_id >> >> > - E1000_VFTA_ENTRY_SHIFT) & >> E1000_VFTA_ENTRY_MASK; >> > - vfta_bit_in_reg = 1 << (hw->mng_cookie.vlan_id & >> > - E1000_VFTA_ENTRY_BIT_SHIFT_MASK); >> > + E1000_VFTA_ENTRY_SHIFT) & >> > + E1000_VFTA_ENTRY_MASK; >> > + vfta_bit_in_reg = >> > + 1 << (hw->mng_cookie.vlan_id & >> > + E1000_VFTA_ENTRY_BIT_SHIFT_MASK); >> > } >> > break; >> > default: >> > break; >> > } >> > for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) { >> > - /* >> > - * If the offset we want to clear is the same offset of >> the >> > + /* If the offset we want to clear is the same offset of >> the >> > * manageability VLAN ID, then clear all bits except that >> of >> > * the manageability unit. >> > */ >> > @@ -1495,8 +1470,7 @@ static s32 e1000_led_on_82574(struct e10 >> > >> > ctrl = hw->mac.ledctl_mode2; >> > if (!(E1000_STATUS_LU & E1000_READ_REG(hw, E1000_STATUS))) { >> > - /* >> > - * If no link, then turn LED on by setting the invert bit >> > + /* If no link, then turn LED on by setting the invert bit >> > * for each LED that's "on" (0x0E) in ledctl_mode2. >> > */ >> > for (i = 0; i < 4; i++) >> > @@ -1519,30 +1493,28 @@ bool e1000_check_phy_82574(struct e1000_ >> > { >> > u16 status_1kbt = 0; >> > u16 receive_errors = 0; >> > - bool phy_hung = FALSE; >> > - s32 ret_val = E1000_SUCCESS; >> > + s32 ret_val; >> > >> > DEBUGFUNC("e1000_check_phy_82574"); >> > >> > - /* >> > - * Read PHY Receive Error counter first, if its is max - all F's >> then >> > + /* Read PHY Receive Error counter first, if its is max - all F's >> then >> > * read the Base1000T status register If both are max then PHY is >> hung. >> > */ >> > ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER, >> > &receive_errors); >> > if (ret_val) >> > - goto out; >> > + return FALSE; >> > if (receive_errors == E1000_RECEIVE_ERROR_MAX) { >> > ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS, >> > &status_1kbt); >> > if (ret_val) >> > - goto out; >> > + return FALSE; >> > if ((status_1kbt & E1000_IDLE_ERROR_COUNT_MASK) == >> > E1000_IDLE_ERROR_COUNT_MASK) >> > - phy_hung = TRUE; >> > + return TRUE; >> > } >> > -out: >> > - return phy_hung; >> > + >> > + return FALSE; >> > } >> > >> > >> > @@ -1560,8 +1532,7 @@ static s32 e1000_setup_link_82571(struct >> > { >> > DEBUGFUNC("e1000_setup_link_82571"); >> > >> > - /* >> > - * 82573 does not have a word in the NVM to determine >> > + /* 82573 does not have a word in the NVM to determine >> > * the default flow control setting, so we explicitly >> > * set it to full. >> > */ >> > @@ -1608,17 +1579,14 @@ static s32 e1000_setup_copper_link_82571 >> > ret_val = e1000_copper_link_setup_igp(hw); >> > break; >> > default: >> > - ret_val = -E1000_ERR_PHY; >> > + return -E1000_ERR_PHY; >> > break; >> > } >> > >> > if (ret_val) >> > - goto out; >> > - >> > - ret_val = e1000_setup_copper_link_generic(hw); >> > + return ret_val; >> > >> > -out: >> > - return ret_val; >> > + return e1000_setup_copper_link_generic(hw); >> > } >> > >> > /** >> > @@ -1635,8 +1603,7 @@ static s32 e1000_setup_fiber_serdes_link >> > switch (hw->mac.type) { >> > case e1000_82571: >> > case e1000_82572: >> > - /* >> > - * If SerDes loopback mode is entered, there is no form >> > + /* If SerDes loopback mode is entered, there is no form >> > * of reset to take the adapter out of that mode. So we >> > * have to explicitly take the adapter out of loopback >> > * mode. This prevents drivers from twiddling their >> thumbs >> > @@ -1685,16 +1652,17 @@ static s32 e1000_check_for_serdes_link_8 >> > >> > ctrl = E1000_READ_REG(hw, E1000_CTRL); >> > status = E1000_READ_REG(hw, E1000_STATUS); >> > + E1000_READ_REG(hw, E1000_RXCW); >> > + /* SYNCH bit and IV bit are sticky */ >> > + usec_delay(10); >> > rxcw = E1000_READ_REG(hw, E1000_RXCW); >> > >> > if ((rxcw & E1000_RXCW_SYNCH) && !(rxcw & E1000_RXCW_IV)) { >> > - >> > /* Receiver is synchronized with no invalid bits. */ >> > switch (mac->serdes_link_state) { >> > case e1000_serdes_link_autoneg_complete: >> > if (!(status & E1000_STATUS_LU)) { >> > - /* >> > - * We have lost link, retry autoneg before >> > + /* We have lost link, retry autoneg before >> > * reporting link failure >> > */ >> > mac->serdes_link_state = >> > @@ -1707,15 +1675,12 @@ static s32 e1000_check_for_serdes_link_8 >> > break; >> > >> > case e1000_serdes_link_forced_up: >> > - /* >> > - * If we are receiving /C/ ordered sets, re-enable >> > + /* If we are receiving /C/ ordered sets, re-enable >> > * auto-negotiation in the TXCW register and >> disable >> > * forced link in the Device Control register in >> an >> > * attempt to auto-negotiate with our link >> partner. >> > - * If the partner code word is null, stop forcing >> > - * and restart auto negotiation. >> > */ >> > - if ((rxcw & E1000_RXCW_C) || !(rxcw & >> E1000_RXCW_CW)) { >> > + if (rxcw & E1000_RXCW_C) { >> > /* Enable autoneg, and unforce link up */ >> > E1000_WRITE_REG(hw, E1000_TXCW, >> mac->txcw); >> > E1000_WRITE_REG(hw, E1000_CTRL, >> > @@ -1731,8 +1696,7 @@ static s32 e1000_check_for_serdes_link_8 >> > >> > case e1000_serdes_link_autoneg_progress: >> > if (rxcw & E1000_RXCW_C) { >> > - /* >> > - * We received /C/ ordered sets, meaning >> the >> > + /* We received /C/ ordered sets, meaning >> the >> > * link partner has autonegotiated, and >> we can >> > * trust the Link Up (LU) status bit. >> > */ >> > @@ -1748,8 +1712,7 @@ static s32 e1000_check_for_serdes_link_8 >> > DEBUGOUT("AN_PROG -> DOWN\n"); >> > } >> > } else { >> > - /* >> > - * The link partner did not autoneg. >> > + /* The link partner did not autoneg. >> > * Force link up and full duplex, and >> change >> > * state to forced. >> > */ >> > @@ -1774,8 +1737,7 @@ static s32 e1000_check_for_serdes_link_8 >> > >> > case e1000_serdes_link_down: >> > default: >> > - /* >> > - * The link was down but the receiver has now >> gained >> > + /* The link was down but the receiver has now >> gained >> > * valid sync, so lets see if we can bring the >> link >> > * up. >> > */ >> > @@ -1794,17 +1756,18 @@ static s32 e1000_check_for_serdes_link_8 >> > mac->serdes_link_state = e1000_serdes_link_down; >> > DEBUGOUT("ANYSTATE -> DOWN\n"); >> > } else { >> > - /* >> > - * Check several times, if Sync and Config >> > - * both are consistently 1 then simply ignore >> > - * the Invalid bit and restart Autoneg >> > + /* Check several times, if SYNCH bit and CONFIG >> > + * bit both are consistently 1 then simply ignore >> > + * the IV bit and restart Autoneg >> > */ >> > for (i = 0; i < AN_RETRY_COUNT; i++) { >> > usec_delay(10); >> > rxcw = E1000_READ_REG(hw, E1000_RXCW); >> > - if ((rxcw & E1000_RXCW_IV) && >> > - !((rxcw & E1000_RXCW_SYNCH) && >> > - (rxcw & E1000_RXCW_C))) { >> > + if ((rxcw & E1000_RXCW_SYNCH) && >> > + (rxcw & E1000_RXCW_C)) >> > + continue; >> > + >> > + if (rxcw & E1000_RXCW_IV) { >> > mac->serdes_has_link = FALSE; >> > mac->serdes_link_state = >> > >> e1000_serdes_link_down; >> > @@ -1845,7 +1808,7 @@ static s32 e1000_valid_led_default_82571 >> > ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); >> > if (ret_val) { >> > DEBUGOUT("NVM Read Error\n"); >> > - goto out; >> > + return ret_val; >> > } >> > >> > switch (hw->mac.type) { >> > @@ -1862,8 +1825,7 @@ static s32 e1000_valid_led_default_82571 >> > break; >> > } >> > >> > -out: >> > - return ret_val; >> > + return E1000_SUCCESS; >> > } >> > >> > /** >> > @@ -1900,15 +1862,14 @@ void e1000_set_laa_state_82571(struct e1 >> > >> > /* If workaround is activated... */ >> > if (state) >> > - /* >> > - * Hold a copy of the LAA in RAR[14] This is done so that >> > + /* Hold a copy of the LAA in RAR[14] This is done so that >> > * between the time RAR[0] gets clobbered and the time it >> > * gets fixed, the actual LAA is in one of the RARs and no >> > * incoming packets directed to this port are dropped. >> > * Eventually the LAA will be in RAR[0] and RAR[14]. >> > */ >> > - e1000_rar_set_generic(hw, hw->mac.addr, >> > - hw->mac.rar_entry_count - 1); >> > + hw->mac.ops.rar_set(hw, hw->mac.addr, >> > + hw->mac.rar_entry_count - 1); >> > return; >> > } >> > >> > @@ -1925,25 +1886,23 @@ void e1000_set_laa_state_82571(struct e1 >> > static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw) >> > { >> > struct e1000_nvm_info *nvm = &hw->nvm; >> > - s32 ret_val = E1000_SUCCESS; >> > + s32 ret_val; >> > u16 data; >> > >> > DEBUGFUNC("e1000_fix_nvm_checksum_82571"); >> > >> > if (nvm->type != e1000_nvm_flash_hw) >> > - goto out; >> > + return E1000_SUCCESS; >> > >> > - /* >> > - * Check bit 4 of word 10h. If it is 0, firmware is done updating >> > + /* Check bit 4 of word 10h. If it is 0, firmware is done updating >> > * 10h-12h. Checksum may need to be fixed. >> > */ >> > >> > *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** >> > _______________________________________________ >> > svn-src-stable-8@freebsd.org mailing list >> > http://lists.freebsd.org/mailman/listinfo/svn-src-stable-8 >> > To unsubscribe, send any mail to " >> svn-src-stable-8-unsubscribe@freebsd.org" >> > >