Date: Wed, 9 Jun 2004 09:20:31 GMT From: Juli Mallett <jmallett@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 54459 for review Message-ID: <200406090920.i599KVCb063804@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=54459 Change 54459 by jmallett@jmallett_oingo on 2004/06/09 09:19:32 Change how children are attached and stuff... Learn the lesson that you have to go through bus_generic_attach or do the probe_and_attach on children yourself! Affected files ... .. //depot/projects/mips/sys/mips/sgimips/imc/imc.c#5 edit Differences ... ==== //depot/projects/mips/sys/mips/sgimips/imc/imc.c#5 (text+ko) ==== @@ -23,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $P4: //depot/projects/mips/sys/mips/sgimips/imc/imc.c#4 $ + * $P4: //depot/projects/mips/sys/mips/sgimips/imc/imc.c#5 $ */ #include <sys/cdefs.h> @@ -35,6 +35,7 @@ #include <sys/module.h> #include <sys/bus.h> +#include <machine/bus.h> #include <platform/models.h> #include <platform/imc/imcreg.h> @@ -64,36 +65,51 @@ "imc", imc_methods, 1 }; +static const char *imc_devices[] = { + "gio", + NULL +}; + +static const u_long imc_port = 0x1fa00000; /* XXX hints */ + +#define IMC_READ_4(port, r) \ + bus_space_read_4(device_space_tag, (port), (r)) + +#define IMC_WRITE_4(port, r, v) \ + bus_space_write_4(device_space_tag, (port), (r), (v)) + static int imc_probe(device_t dev) { + const char **namep; + + if (device_get_unit(dev) != 0) + return (ENXIO); + switch (mach_type) { case MACH_SGI_IP22: + device_set_desc(dev, "IMC Bus"); + for (namep = imc_devices; *namep != NULL; namep++) + device_add_child(dev, *namep, -1); return (0); default: return (ENOENT); } } -#define IMC_READ_4(port, r) \ - (*(volatile uint32_t *)(MIPS_PHYS_TO_KSEG1(port) | r)) - -#define IMC_WRITE_4(port, r, v) \ - ((*(volatile uint32_t *)(MIPS_PHYS_TO_KSEG1(port) | r)) = (v)) - static int imc_attach(device_t dev) { - const u_long port = 0x1fa00000; /* XXX hints */ + uint32_t reg; uint32_t sysid; - uint32_t reg; - sysid = IMC_READ_4(port, IMC_SYSID); - device_printf(dev, "revision %d, EISA %s\n", sysid & IMC_SYSID_REVMASK, sysid & IMC_SYSID_HAVEISA ? "present" : "not present"); + sysid = IMC_READ_4(imc_port, IMC_SYSID); + device_printf(dev, "revision %d, EISA %s\n", sysid & IMC_SYSID_REVMASK, + sysid & IMC_SYSID_HAVEISA ? "present" : "not present"); /* Clear error status. */ - IMC_WRITE_4(port, IMC_CPU_ERRSTAT, 0); - IMC_WRITE_4(port, IMC_GIO_ERRSTAT, 0); + IMC_WRITE_4(imc_port, IMC_CPU_ERRSTAT, 0); + IMC_WRITE_4(imc_port, IMC_GIO_ERRSTAT, 0); /* * Enable parity reporting on GIO/main memory transactions. @@ -103,15 +119,15 @@ * has the opposite sense... Turning it on turns the checks off!). * Finally, turn on interrupt writes to the CPU from the MC. */ - reg = IMC_READ_4(port, IMC_CPUCTRL0); + reg = IMC_READ_4(imc_port, IMC_CPUCTRL0); reg &= ~IMC_CPUCTRL0_NCHKMEMPAR; reg |= (IMC_CPUCTRL0_GPR | IMC_CPUCTRL0_MPR | IMC_CPUCTRL0_INTENA); - IMC_WRITE_4(port, IMC_CPUCTRL0, reg); + IMC_WRITE_4(imc_port, IMC_CPUCTRL0, reg); /* Setup the MC write buffer depth */ - reg = IMC_READ_4(port, IMC_CPUCTRL1); + reg = IMC_READ_4(imc_port, IMC_CPUCTRL1); reg = (reg & ~IMC_CPUCTRL1_MCHWMSK) | 13; - IMC_WRITE_4(port, IMC_CPUCTRL1, reg); + IMC_WRITE_4(imc_port, IMC_CPUCTRL1, reg); /* * Set GIO64 arbitrator configuration register: @@ -120,7 +136,7 @@ * on the graphics variant present and I'm not sure how to figure * that out or 100% sure what the correct settings are for each. */ - reg = IMC_READ_4(port, IMC_GIO64ARB); + reg = IMC_READ_4(imc_port, IMC_GIO64ARB); reg &= (IMC_GIO64ARB_GRX64 | IMC_GIO64ARB_GRXRT | IMC_GIO64ARB_GRXMST); /* GIO64 invariant for all IP22 platforms: one GIO bus, HPC1 @ 64 */ @@ -149,9 +165,9 @@ } break; } - IMC_WRITE_4(port, IMC_GIO64ARB, reg); + IMC_WRITE_4(imc_port, IMC_GIO64ARB, reg); - device_add_child(dev, "gio", 0); + bus_generic_attach(dev); return (0); }
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