From owner-cvs-all@FreeBSD.ORG Mon Sep 27 10:10:46 2004 Return-Path: Delivered-To: cvs-all@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 013D416A4CE; Mon, 27 Sep 2004 10:10:46 +0000 (GMT) Received: from mail-gw1.york.ac.uk (mail-gw1.york.ac.uk [144.32.128.246]) by mx1.FreeBSD.org (Postfix) with ESMTP id 45F0F43D4C; Mon, 27 Sep 2004 10:10:45 +0000 (GMT) (envelope-from gavin.atkinson@ury.york.ac.uk) Received: from buffy.york.ac.uk (buffy.york.ac.uk [144.32.226.160]) by mail-gw1.york.ac.uk (8.12.10/8.12.10) with ESMTP id i8RAAToi010424; Mon, 27 Sep 2004 11:10:29 +0100 (BST) Received: from buffy.york.ac.uk (localhost [127.0.0.1]) by buffy.york.ac.uk (8.13.1/8.13.1) with ESMTP id i8RAAQ3I003523; Mon, 27 Sep 2004 11:10:26 +0100 (BST) (envelope-from gavin.atkinson@ury.york.ac.uk) Received: (from ga9@localhost) by buffy.york.ac.uk (8.13.1/8.13.1/Submit) id i8RAANv8003522; Mon, 27 Sep 2004 11:10:23 +0100 (BST) (envelope-from gavin.atkinson@ury.york.ac.uk) X-Authentication-Warning: buffy.york.ac.uk: ga9 set sender to gavin.atkinson@ury.york.ac.uk using -f From: Gavin Atkinson To: Peter Jeremy In-Reply-To: <20040927093127.GH83620@cirb503493.alcatel.com.au> References: <20040924094950.N39925@pooker.samsco.org> <20040925.225150.20525280.imp@bsdimp.com> <20040926162333.GC1164@green.homeunix.org> <200409271243.37300.doconnor@gsoft.com.au> <20040927093127.GH83620@cirb503493.alcatel.com.au> Content-Type: text/plain Content-Transfer-Encoding: 7bit Message-Id: <1096279822.3329.31.camel@buffy.york.ac.uk> Mime-Version: 1.0 X-Mailer: Ximian Evolution 1.4.6 Date: Mon, 27 Sep 2004 11:10:23 +0100 X-York-MailScanner: Found to be clean X-York-MailScanner-From: gavin.atkinson@ury.york.ac.uk cc: Brian Fundakowski Feldman cc: src-committers@freebsd.org cc: cvs-all@freebsd.org cc: cvs-src@freebsd.org cc: "M. Warner Losh" Subject: Re: cvs commit: src/sys/net if.c X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Sep 2004 10:10:46 -0000 On Mon, 2004-09-27 at 10:31, Peter Jeremy wrote: > On Mon, 2004-Sep-27 12:43:29 +0930, Daniel O'Connor wrote: > >Hmm, MS have a circuit diagram -> > >http://www.microsoft.com/whdc/system/CEC/dmpsw.mspx > > I bumped into that as well. The innards of the PAL aren't documented > anywhere that I could see and there seems to be quite a lot of logic > when the only inputs are the PCI clock and the NMI switch. (Bloated > design and undocumented internals - sounds familiar :-). > > >Pin 42 is #SERR and the other side of it in ground. > > Does anyone with knowledge of the PCI spec know if just shorting #SERR > to ground will work? (Assuming that the BIOS/chipset maps #SERR to NMI). It is possible. The PCI 2.2 spec (section 3.7.4.2) says that it should be asserted for a *single* clock cycle, then tri-stated. However, it also suggests that all that is actually necessary is for it to be sampled as being de-asserted for two successive rising clock edges after an assertion for an NMI to actually be triggered. So it depends on how strictly they enforce the need for assertion to last a "single clock cycle". Regardless of anything else, I wouldn't like to just short SERR# to ground with a screwdriver as used to be possible in the Good Ol' ISA Days... A bit of debounce logic (which I suspect is mainly what the PAL is there to achieve in the Microsoft design) would be necessary to prevent multiple NMI's from being sent. Gavin