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From: Alexander Motin <mav@FreeBSD.org>
Date: Sun, 30 Nov 2008 00:10:55 +0000 (UTC)
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Subject: svn commit: r185460 - head/sys/amd64/amd64
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Author: mav
Date: Sun Nov 30 00:10:55 2008
New Revision: 185460
URL: http://svn.freebsd.org/changeset/base/185460

Log:
  According to "Intel 64 and IA-32 Architectures Software Developer's Manual
  Volume 3B: System Programming Guide, Part 2", CPUs with family 0x6 and model
  above or 0xE and CPUs with family 0xF and model above or 0x3 have invariant
  TSC.

Modified:
  head/sys/amd64/amd64/identcpu.c

Modified: head/sys/amd64/amd64/identcpu.c
==============================================================================
--- head/sys/amd64/amd64/identcpu.c	Sun Nov 30 00:00:35 2008	(r185459)
+++ head/sys/amd64/amd64/identcpu.c	Sun Nov 30 00:10:55 2008	(r185460)
@@ -368,7 +368,11 @@ printcpuinfo(void)
 					tsc_is_invariant = 1;
 				break;
 			case CPU_VENDOR_INTEL:
-				if (amd_pminfo & AMDPM_TSC_INVARIANT)
+				if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
+				    (AMD64_CPU_FAMILY(cpu_id) == 0x6 &&
+				    AMD64_CPU_MODEL(cpu_id) >= 0xe) ||
+				    (AMD64_CPU_FAMILY(cpu_id) == 0xf &&
+				    AMD64_CPU_MODEL(cpu_id) >= 0x3))
 					tsc_is_invariant = 1;
 				break;
 			}