From owner-svn-src-stable@freebsd.org Thu Aug 16 08:05:05 2018 Return-Path: Delivered-To: svn-src-stable@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 69AF01081581; Thu, 16 Aug 2018 08:05:05 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 1C42A7317C; Thu, 16 Aug 2018 08:05:05 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id F20FA16A58; Thu, 16 Aug 2018 08:05:04 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w7G854xB015700; Thu, 16 Aug 2018 08:05:04 GMT (envelope-from hselasky@FreeBSD.org) Received: (from hselasky@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w7G854Pi015699; Thu, 16 Aug 2018 08:05:04 GMT (envelope-from hselasky@FreeBSD.org) Message-Id: <201808160805.w7G854Pi015699@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: hselasky set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky Date: Thu, 16 Aug 2018 08:05:04 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r337893 - stable/11/sys/i386/include X-SVN-Group: stable-11 X-SVN-Commit-Author: hselasky X-SVN-Commit-Paths: stable/11/sys/i386/include X-SVN-Commit-Revision: 337893 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Aug 2018 08:05:05 -0000 Author: hselasky Date: Thu Aug 16 08:05:04 2018 New Revision: 337893 URL: https://svnweb.freebsd.org/changeset/base/337893 Log: MFC r337529: Implement missing atomic_fcmpset_XXX() support for i386. Sponsored by: Mellanox Technologies Modified: stable/11/sys/i386/include/atomic.h Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/i386/include/atomic.h ============================================================================== --- stable/11/sys/i386/include/atomic.h Thu Aug 16 07:34:10 2018 (r337892) +++ stable/11/sys/i386/include/atomic.h Thu Aug 16 08:05:04 2018 (r337893) @@ -128,6 +128,7 @@ u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p) void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) int atomic_cmpset_64(volatile uint64_t *, uint64_t, uint64_t); +int atomic_fcmpset_64(volatile uint64_t *, uint64_t *, uint64_t); uint64_t atomic_load_acq_64(volatile uint64_t *); void atomic_store_rel_64(volatile uint64_t *, uint64_t); uint64_t atomic_swap_64(volatile uint64_t *, uint64_t); @@ -402,6 +403,18 @@ atomic_cmpset_64_i386(volatile uint64_t *dst, uint64_t return (res); } +static __inline int +atomic_fcmpset_64_i386(volatile uint64_t *dst, uint64_t *expect, uint64_t src) +{ + + if (atomic_cmpset_64_i386(dst, *expect, src)) { + return (1); + } else { + *expect = *dst; + return (0); + } +} + static __inline uint64_t atomic_load_acq_64_i386(volatile uint64_t *p) { @@ -481,6 +494,24 @@ atomic_cmpset_64_i586(volatile uint64_t *dst, uint64_t return (res); } +static __inline int +atomic_fcmpset_64_i586(volatile uint64_t *dst, uint64_t *expect, uint64_t src) +{ + u_char res; + + __asm __volatile( + " " MPLOCKED " " + " cmpxchg8b %1 ; " + " sete %0" + : "=q" (res), /* 0 */ + "+m" (*dst), /* 1 */ + "+A" (*expect) /* 2 */ + : "b" ((uint32_t)src), /* 3 */ + "c" ((uint32_t)(src >> 32)) /* 4 */ + : "memory", "cc"); + return (res); +} + static __inline uint64_t atomic_load_acq_64_i586(volatile uint64_t *p) { @@ -540,6 +571,16 @@ atomic_cmpset_64(volatile uint64_t *dst, uint64_t expe return (atomic_cmpset_64_i586(dst, expect, src)); } +static __inline int +atomic_fcmpset_64(volatile uint64_t *dst, uint64_t *expect, uint64_t src) +{ + + if ((cpu_feature & CPUID_CX8) == 0) + return (atomic_fcmpset_64_i386(dst, expect, src)); + else + return (atomic_fcmpset_64_i586(dst, expect, src)); +} + static __inline uint64_t atomic_load_acq_64(volatile uint64_t *p) { @@ -653,6 +694,14 @@ atomic_cmpset_long(volatile u_long *dst, u_long expect (u_int)src)); } +static __inline int +atomic_fcmpset_long(volatile u_long *dst, u_long *expect, u_long src) +{ + + return (atomic_fcmpset_int((volatile u_int *)dst, (u_int *)expect, + (u_int)src)); +} + static __inline u_long atomic_fetchadd_long(volatile u_long *p, u_long v) { @@ -832,6 +881,8 @@ u_long atomic_swap_long(volatile u_long *p, u_long v); /* Operations on 64-bit quad words. */ #define atomic_cmpset_acq_64 atomic_cmpset_64 #define atomic_cmpset_rel_64 atomic_cmpset_64 +#define atomic_fcmpset_acq_64 atomic_fcmpset_64 +#define atomic_fcmpset_rel_64 atomic_fcmpset_64 #define atomic_fetchadd_acq_64 atomic_fetchadd_64 #define atomic_fetchadd_rel_64 atomic_fetchadd_64 #define atomic_add_acq_64 atomic_add_64