Date: Mon, 24 Nov 2008 21:50:04 GMT From: Marius Strobl <marius@alchemy.franken.de> To: freebsd-net@FreeBSD.org Subject: Re: kern/128833: [bge] Network packets corrupted when bge card is in 64-bit PCI slot Message-ID: <200811242150.mAOLo4LZ015020@freefall.freebsd.org>
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The following reply was made to PR kern/128833; it has been noted by GNATS. From: Marius Strobl <marius@alchemy.franken.de> To: David Christensen <davidch@broadcom.com> Cc: "bug-followup@FreeBSD.org" <bug-followup@FreeBSD.org> Subject: Re: kern/128833: [bge] Network packets corrupted when bge card is in 64-bit PCI slot Date: Mon, 24 Nov 2008 22:40:36 +0100 On Mon, Nov 24, 2008 at 11:28:10AM -0800, David Christensen wrote: > > > There is a documented errata for the 5701 A3 where a 64bit DMA > > > read can be terminated early by the bridge and then completed > > > later as a 32bit access, causing corruption on the 5701. The > > > errata states this type of behavior is rare in bridges and that > > > the workaround is to force 32bit operation (set bit 15 of register > > > 0x6800). It's not clear whether this errata is occurring without > > > seeing a but trace but it certainly sounds right. The only > > > question would be knowing "when" to force 32bit operation. Should > > > it be done in all cases or only for this bridge? > > > > > > > David, > > > > could it be that bug doesn't only affect 5701 A3 but also > > B3 (i.e. chipid 0x01050000) as in this case or even all 5701 > > revisions? > > I checked the assembly instructions for the 5701 and even though > the ASIC ID decodes as B5, the revision of the chip is actually > A3. (You should be able to verify this as the silkscreen on the > part should show "P13".) Unfortunately the "friendly" revision > of the chip doesn't match the "ASIC" revision of the chip for the > 5701 and the errata references the "friendly" name. The result > is that the part you know as B5 is affected by this errata. Other > versions of the chip (A2 which you know as B2 and A1 which you > know as B1) are not subject to this errata. Ah, this explains it. Thanks for looking it up! > > > How does the problem you describe relate to the > > 5701 PCI-X issue, which we align the RX buffer differently > > for as a workaround, would that problem also be avoided > > by limiting 5701 to 32-bit operations? Or is the A3-errata > > you described an entirely different issue and limited to 5701 > > in a 64-bit non-PCI-X slot, or would 5701 in a PCI-X slot > > even require both workarounds? > > Which PCI-X issue are you referring to? Can you point me to > the line number on http://fxr.watson.org/fxr/source/dev/bge/if_bge.c? > I was refering to BGE_FLAG_RX_ALIGNBUG, the lines dealing with it are 874-875, 933-934, 2698-2708 and 3112-3122. The Linux tg3 driver does pretty much the same via rx_offset. Marius
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