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Date:      Fri, 31 Jul 1998 15:41:45 +1000
From:      Stephen McKay <syssgm@dtir.qld.gov.au>
To:        bill schaub <talon@hancock.k12.mo.us>
Cc:        freebsd-hackers@FreeBSD.ORG, syssgm@dtir.qld.gov.au
Subject:   Re: you may be intrested in this strange problem i found in 2.2.1 
Message-ID:  <199807310541.PAA11224@nymph.dtir.qld.gov.au>
In-Reply-To: <Pine.BSF.3.95q.980730155818.9652D-100000@hancock.k12.mo.us> from bill schaub at "Thu, 30 Jul 1998 16:19:35 -0500"
References:  <Pine.BSF.3.95q.980730155818.9652D-100000@hancock.k12.mo.us>

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On Thursday, 30th July 1998, bill schaub wrote:

>im running 2.2.1 on a 386 for a web and email server ...

>the problem is after the system is runnign for a while it stops reporting
>the cpu useage for any process and systat dies with the alternate system
>clock has died now reverting to "pigs" display iostat keeps reporting a
>bogus reading of 92 % idle 3 % user 3% system and 2% interrupt witch is
>bogus sicne it stays the same even when compileing the kernel

Upgrade to 2.2.7.  This problem was fixed in 2.2.2.  But if you want a
quick fix, apply this patch to /sys/i386/isa/clock.c:

Index: clock.c
===================================================================
RCS file: /cvs/src/sys/i386/isa/clock.c,v
retrieving revision 1.72.2.3
retrieving revision 1.72.2.4
diff -u -r1.72.2.3 -r1.72.2.4
--- clock.c	1997/03/05 08:19:02	1.72.2.3
+++ clock.c	1997/04/27 13:44:19	1.72.2.4
@@ -34,7 +34,7 @@
  * SUCH DAMAGE.
  *
  *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
- *	$Id: clock.c,v 1.72.2.3 1997/03/05 08:19:02 bde Exp $
+ *	$Id: clock.c,v 1.72.2.4 1997/04/27 13:44:19 mckay Exp $
  */
 
 /*
@@ -311,15 +311,20 @@
  *
  * The RTC chip requires that we read status register C (RTC_INTR)
  * to acknowledge an interrupt, before it will generate the next one.
+ * Under high interrupt load, rtcintr() can be indefinitely delayed and
+ * the clock can tick immediately after the read from RTC_INTR.  In this
+ * case, the mc146818A interrupt signal will not drop for long enough
+ * to register with the 8259 PIC.  If an interrupt is missed, the stat
+ * clock will halt, considerably degrading system performance.  This is
+ * why we use 'while' rather than a more straightforward 'if' below.
+ * Stat clock ticks can still be lost, causing minor loss of accuracy
+ * in the statistics, but the stat clock will no longer stop.
  */
 static void
 rtcintr(struct clockframe frame)
 {
-	u_char stat;
-	stat = rtcin(RTC_INTR);
-	if(stat & RTCIR_PERIOD) {
+	while (rtcin(RTC_INTR) & RTCIR_PERIOD)
 		statclock(&frame);
-	}
 }
 
 #include "opt_ddb.h"

>i know i dont have good grammer skills but i am not a total moron

Don't skimp on the capitalisation and punctuation, or most people will
assume the worst.

Stephen.

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