From owner-svn-src-head@FreeBSD.ORG Thu Dec 13 11:00:30 2012 Return-Path: Delivered-To: svn-src-head@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 1F183D05; Thu, 13 Dec 2012 11:00:30 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from citadel.icyb.net.ua (citadel.icyb.net.ua [212.40.38.140]) by mx1.freebsd.org (Postfix) with ESMTP id C6D608FC13; Thu, 13 Dec 2012 11:00:28 +0000 (UTC) Received: from odyssey.starpoint.kiev.ua (alpha-e.starpoint.kiev.ua [212.40.38.101]) by citadel.icyb.net.ua (8.8.8p3/ICyb-2.3exp) with ESMTP id NAA14185; Thu, 13 Dec 2012 13:00:27 +0200 (EET) (envelope-from avg@FreeBSD.org) Message-ID: <50C9B54B.1080302@FreeBSD.org> Date: Thu, 13 Dec 2012 13:00:27 +0200 From: Andriy Gapon User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/17.0 Thunderbird/17.0 MIME-Version: 1.0 To: John Baldwin Subject: Re: svn commit: r243764 - head/sys/x86/x86 References: <201212011816.qB1IGE2Y064317@svn.freebsd.org> <201212061540.42393.jhb@freebsd.org> In-Reply-To: <201212061540.42393.jhb@freebsd.org> X-Enigmail-Version: 1.4.6 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: svn-src-head@FreeBSD.org, svn-src-all@FreeBSD.org, src-committers@FreeBSD.org X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Dec 2012 11:00:30 -0000 on 06/12/2012 22:40 John Baldwin said the following: > On Saturday, December 01, 2012 1:16:14 pm Andriy Gapon wrote: >> Author: avg >> Date: Sat Dec 1 18:16:14 2012 >> New Revision: 243764 >> URL: http://svnweb.freebsd.org/changeset/base/243764 >> >> Log: >> ioapic_program_intpin: program high bits before low bits >> >> Programming the low bits has a side-effect if unmasking the pin if it is >> not disabled. So if an interrupt was pending then it would be delivered >> with the correct new vector but to the incorrect old LAPIC. >> >> This fix could be made clearer by preserving the mask bit while >> programming the low bits and then explicitly resetting the mask bit >> after all the programming is done. >> >> Probability to trip over the fixed bug could be increased by bootverbose >> because printing of the interrupt information in ioapic_assign_cpu >> lengthened the time window during which an interrupt could arrive while >> a pin is masked. > > Can you expand the comment to say that you write 'low' second since it may > clear the masked bit? > Will do. -- Andriy Gapon