From owner-svn-src-all@FreeBSD.ORG Wed Jun 23 03:59:27 2010 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 31128106564A; Wed, 23 Jun 2010 03:59:27 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 209558FC18; Wed, 23 Jun 2010 03:59:27 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o5N3xRF5050118; Wed, 23 Jun 2010 03:59:27 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o5N3xR7R050116; Wed, 23 Jun 2010 03:59:27 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201006230359.o5N3xR7R050116@svn.freebsd.org> From: Adrian Chadd Date: Wed, 23 Jun 2010 03:59:27 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r209454 - head/sys/mips/atheros X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Jun 2010 03:59:27 -0000 Author: adrian Date: Wed Jun 23 03:59:26 2010 New Revision: 209454 URL: http://svn.freebsd.org/changeset/base/209454 Log: AR71XX GPIO register definitions. Reviewed by: gonzo@ Modified: head/sys/mips/atheros/ar71xxreg.h Modified: head/sys/mips/atheros/ar71xxreg.h ============================================================================== --- head/sys/mips/atheros/ar71xxreg.h Wed Jun 23 03:56:53 2010 (r209453) +++ head/sys/mips/atheros/ar71xxreg.h Wed Jun 23 03:59:26 2010 (r209454) @@ -137,6 +137,27 @@ #define USB_CTRL_CONFIG_RESUME_UTMI_PLS_DIS (1 << 1) #define USB_CTRL_CONFIG_UTMI_BACKWARD_ENB (1 << 0) +#define AR71XX_GPIO_BASE 0x18040000 +#define AR71XX_GPIO_OE 0x00 +#define AR71XX_GPIO_IN 0x04 +#define AR71XX_GPIO_OUT 0x08 +#define AR71XX_GPIO_SET 0x0c +#define AR71XX_GPIO_CLEAR 0x10 +#define AR71XX_GPIO_INT 0x14 +#define AR71XX_GPIO_INT_TYPE 0x18 +#define AR71XX_GPIO_INT_POLARITY 0x1c +#define AR71XX_GPIO_INT_PENDING 0x20 +#define AR71XX_GPIO_INT_MASK 0x24 +#define AR71XX_GPIO_FUNCTION 0x28 +#define GPIO_FUNC_STEREO_EN (1 << 17) +#define GPIO_FUNC_SLIC_EN (1 << 16) +#define GPIO_FUNC_SPI_CS1_EN (1 << 15) +#define GPIO_FUNC_SPI_CS0_EN (1 << 14) +#define GPIO_FUNC_SPI_EN (1 << 13) +#define GPIO_FUNC_UART_EN (1 << 8) +#define GPIO_FUNC_USB_OC_EN (1 << 4) +#define GPIO_FUNC_USB_CLK_EN (0) + #define AR71XX_BASE_FREQ 40000000 #define AR71XX_PLL_CPU_CONFIG 0x18050000 #define PLL_SW_UPDATE (1 << 31)