From owner-freebsd-stable@FreeBSD.ORG Fri Aug 27 20:19:42 2010 Return-Path: Delivered-To: freebsd-stable@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E2FA710656D2; Fri, 27 Aug 2010 20:19:42 +0000 (UTC) (envelope-from avg@icyb.net.ua) Received: from citadel.icyb.net.ua (citadel.icyb.net.ua [212.40.38.140]) by mx1.freebsd.org (Postfix) with ESMTP id 060B18FC18; Fri, 27 Aug 2010 20:19:41 +0000 (UTC) Received: from porto.topspin.kiev.ua (porto-e.starpoint.kiev.ua [212.40.38.100]) by citadel.icyb.net.ua (8.8.8p3/ICyb-2.3exp) with ESMTP id XAA24241; Fri, 27 Aug 2010 23:19:40 +0300 (EEST) (envelope-from avg@icyb.net.ua) Received: from localhost.topspin.kiev.ua ([127.0.0.1]) by porto.topspin.kiev.ua with esmtp (Exim 4.34 (FreeBSD)) id 1Op5Ol-0003Ny-NR; Fri, 27 Aug 2010 23:19:39 +0300 Message-ID: <4C781DDB.1080903@icyb.net.ua> Date: Fri, 27 Aug 2010 23:19:39 +0300 From: Andriy Gapon User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.8) Gecko/20100822 Lightning/1.0b2 Thunderbird/3.1.2 MIME-Version: 1.0 To: Jung-uk Kim References: <201007141414.o6EEEUx9014690@lurza.secnetix.de> <201008271536.08773.jkim@FreeBSD.org> <4C781640.8010909@icyb.net.ua> <201008271615.58056.jkim@FreeBSD.org> In-Reply-To: <201008271615.58056.jkim@FreeBSD.org> X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: freebsd-stable@FreeBSD.org Subject: Re: 8.1-PRERELEASE: CPU packages not detected correctly X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Aug 2010 20:19:43 -0000 on 27/08/2010 23:15 Jung-uk Kim said the following: > I quickly looked over Xen sources. It seems the CPUID instruction is > translated by this code: > > http://lxr.xensource.com/lxr/source/tools/libxc/xc_cpuid_x86.c > > For HVM case, this is how the CPUID_HTT_CORES is set: > > 185 case 0x00000001: > 186 /* > 187 * EBX[23:16] is Maximum Logical Processors Per Package. > 188 * Update to reflect vLAPIC_ID = vCPU_ID * 2. > 189 */ > 190 regs[1] = (regs[1] & 0x0000ffffu) | ((regs[1] & 0x007f0000u) << 1); > > But CPUID 0x0b is not handled and falls here: Does it have to be handled? 0x4 should still work. > 265 default: > 266 regs[0] = regs[1] = regs[2] = regs[3] = 0; > 267 break; > > I am not a Xen developer, so please don't shoot me. ;-) I still don't get your point. My point is that if the Intel's code gets the topology right, then the hardware is emulated properly and the problem is with the patch. What is your point? :) -- Andriy Gapon