From owner-svn-src-head@FreeBSD.ORG Fri Mar 21 04:45:58 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 0021F4FB; Fri, 21 Mar 2014 04:45:57 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id E05323C7; Fri, 21 Mar 2014 04:45:57 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s2L4jv6T011308; Fri, 21 Mar 2014 04:45:57 GMT (envelope-from jhibbits@svn.freebsd.org) Received: (from jhibbits@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s2L4jvEP011307; Fri, 21 Mar 2014 04:45:57 GMT (envelope-from jhibbits@svn.freebsd.org) Message-Id: <201403210445.s2L4jvEP011307@svn.freebsd.org> From: Justin Hibbits Date: Fri, 21 Mar 2014 04:45:57 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r263464 - head/sys/powerpc/include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 Mar 2014 04:45:58 -0000 Author: jhibbits Date: Fri Mar 21 04:45:57 2014 New Revision: 263464 URL: http://svnweb.freebsd.org/changeset/base/263464 Log: Mask out SRR1 bits that aren't exported to the MSR. This appears to fix a strange condition with X on 32-bit PowerBooks I observed, caused by one of these bits getting set in the mcontext, but not set in the thread, which may be a symptom of another problem, more difficult to diagnose. Since these bits aren't exported anyway, this change makes it more explicit that the bits aren't MSR-related in SRR1. MFC after: 3 weeks Modified: head/sys/powerpc/include/psl.h Modified: head/sys/powerpc/include/psl.h ============================================================================== --- head/sys/powerpc/include/psl.h Fri Mar 21 04:33:38 2014 (r263463) +++ head/sys/powerpc/include/psl.h Fri Mar 21 04:45:57 2014 (r263464) @@ -88,15 +88,17 @@ #define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE) #elif defined(BOOKE_PPC4XX) #define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE | PSL_FP) +#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */ #elif defined(AIM) #ifdef __powerpc64__ #define PSL_KERNSET (PSL_SF | PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI) #else #define PSL_KERNSET (PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI) #endif +#define PSL_SRR1_MASK 0x78300000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */ #endif #define PSL_USERSET (PSL_KERNSET | PSL_PR) -#define PSL_USERSTATIC ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1) +#define PSL_USERSTATIC (~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1) & ~PSL_SRR1_MASK) #endif /* _MACHINE_PSL_H_ */