From owner-freebsd-arm@FreeBSD.ORG Wed Sep 19 08:16:09 2007 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9F07C16A421 for ; Wed, 19 Sep 2007 08:16:09 +0000 (UTC) (envelope-from nb@synthcom.com) Received: from synthcom.com (static-71-245-103-2.ptldor.fios.verizon.net [71.245.103.2]) by mx1.freebsd.org (Postfix) with ESMTP id 5F53813C4B0 for ; Wed, 19 Sep 2007 08:16:09 +0000 (UTC) (envelope-from nb@synthcom.com) Received: from static-71-245-103-2.ptldor.fios.verizon.net (static-71-245-103-2.ptldor.fios.verizon.net [71.245.103.2]) by synthcom.com (8.13.8/8.13.8) with ESMTP id l8J8G80Y060324 for ; Wed, 19 Sep 2007 01:16:08 -0700 (PDT) (envelope-from nb@synthcom.com) Date: Wed, 19 Sep 2007 01:16:08 -0700 (PDT) From: Neil Bradley cc: freebsd-arm@freebsd.org In-Reply-To: <1153.87.234.225.18.1190189325.squirrel@webmail.alpha-tierchen.de> Message-ID: <20070919011453.U55860@synthcom.com> References: <20070918182508.V24397@fw.reifenberger.com> <46F0064C.3080702@uchicago.edu> <20070918220327.V25238@fw.reifenberger.com> <20070918151418.Y51724@synthcom.com> <62362.2001:6f8:101e:0:20e:cff:fe6d:6adb.1190154987.squirrel@webmail.alpha-tierchen.de> <20070918153651.G51724@synthcom.com> <1153.87.234.225.18.1190189325.squirrel@webmail.alpha-tierchen.de> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-3.0 (synthcom.com [71.245.103.2]); Wed, 19 Sep 2007 01:16:09 -0700 (PDT) Subject: Re: 64bit integer problem? X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Sep 2007 08:16:09 -0000 > There is only one architecture (ARM), several families (i.e. ARMv4, > ARMv5), and many implementations (XScale, ARM9, ARM7, ARM11). The ARM > architecture doesn't define specific endianess, but commonly known > implementations provide both endianesses. If the architecture supports both, then it really doesn't matter. PowerPC is a "big endian" architecture, but supports little endian. >> None of the ARM architectures I've worked with (XScale, ARM9, ARM7, >> ARM11) have ever come up by default in big endian. > This is correct behaviour. The reference manual demands little endian as > default if both are implemented. There isn't an ARM implementation that doesn't have little endian (or the option for big endian AFAIK). The bigger question is, why put the chip in big endian mode in the first place when little is the default? -->Neil ---------------------------------------------------------------------------- C. Neil Bradley - KE7IXP - The one eyed man in the land of the blind is not king. He's a prisoner.