From owner-svn-src-vendor@freebsd.org Thu Jun 1 20:58:40 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 1751EB7EA58; Thu, 1 Jun 2017 20:58:40 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 7CB5F67C3D; Thu, 1 Jun 2017 20:58:39 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v51KwcPt034971; Thu, 1 Jun 2017 20:58:38 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v51KwblD034957; Thu, 1 Jun 2017 20:58:37 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201706012058.v51KwblD034957@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Thu, 1 Jun 2017 20:58:37 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r319461 - in vendor/llvm/dist: docs include/llvm include/llvm/Analysis include/llvm/CodeGen include/llvm/CodeGen/GlobalISel include/llvm/DebugInfo include/llvm/DebugInfo/CodeView includ... X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Jun 2017 20:58:40 -0000 Author: dim Date: Thu Jun 1 20:58:36 2017 New Revision: 319461 URL: https://svnweb.freebsd.org/changeset/base/319461 Log: Vendor import of llvm trunk r304460: https://llvm.org/svn/llvm-project/llvm/trunk@304460 Added: vendor/llvm/dist/include/llvm/DebugInfo/CodeView/CodeViewSymbols.def vendor/llvm/dist/include/llvm/DebugInfo/CodeView/CodeViewTypes.def vendor/llvm/dist/include/llvm/ObjectYAML/CodeViewYAMLDebugSections.h (contents, props changed) vendor/llvm/dist/include/llvm/ObjectYAML/CodeViewYAMLSymbols.h (contents, props changed) vendor/llvm/dist/include/llvm/ObjectYAML/CodeViewYAMLTypes.h (contents, props changed) vendor/llvm/dist/include/llvm/Transforms/IPO/ThinLTOBitcodeWriter.h (contents, props changed) vendor/llvm/dist/lib/CodeGen/LiveRangeShrink.cpp (contents, props changed) vendor/llvm/dist/lib/ObjectYAML/CodeViewYAMLDebugSections.cpp (contents, props changed) vendor/llvm/dist/lib/ObjectYAML/CodeViewYAMLSymbols.cpp (contents, props changed) vendor/llvm/dist/lib/ObjectYAML/CodeViewYAMLTypes.cpp (contents, props changed) vendor/llvm/dist/test/Analysis/CFLAliasAnalysis/Andersen/struct.ll vendor/llvm/dist/test/CodeGen/AArch64/addcarry-crash.ll vendor/llvm/dist/test/CodeGen/AArch64/pr33172.ll vendor/llvm/dist/test/CodeGen/AMDGPU/waitcnt-permute.mir vendor/llvm/dist/test/CodeGen/Hexagon/invalid-dotnew-attempt.mir vendor/llvm/dist/test/CodeGen/Hexagon/loop-idiom/pmpy-long-loop.ll vendor/llvm/dist/test/CodeGen/Hexagon/mul64-sext.ll vendor/llvm/dist/test/CodeGen/PowerPC/logic-ops-on-compares.ll vendor/llvm/dist/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll vendor/llvm/dist/test/CodeGen/PowerPC/memcmp.ll vendor/llvm/dist/test/CodeGen/PowerPC/memcmpIR.ll vendor/llvm/dist/test/CodeGen/PowerPC/ppc64-get-cache-line-size.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesieqsll.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesiequll.ll vendor/llvm/dist/test/CodeGen/PowerPC/testCompareslleqsll.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesllequll.ll vendor/llvm/dist/test/CodeGen/PowerPC/vec_xxpermdi.ll vendor/llvm/dist/test/CodeGen/X86/eh-unknown.ll vendor/llvm/dist/test/CodeGen/X86/gnu-seh-nolpads.ll vendor/llvm/dist/test/CodeGen/X86/lrshrink.ll vendor/llvm/dist/test/CodeGen/X86/pr32610.ll vendor/llvm/dist/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll vendor/llvm/dist/test/Other/new-pm-thinlto-defaults.ll vendor/llvm/dist/test/ThinLTO/X86/newpm-basic.ll vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineAlloca.ll vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineAlloca2.ll vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineAlloca4.ll vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineAlloca5.ll vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineLiveAcross.ll vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineNoLiveOut.ll vendor/llvm/dist/test/Transforms/LoopVectorize/AArch64/no_vector_instructions.ll vendor/llvm/dist/test/Transforms/LowerExpectIntrinsic/expect_nonboolean.ll vendor/llvm/dist/test/Transforms/NewGVN/pr33185.ll vendor/llvm/dist/test/Transforms/ThinLTOBitcodeWriter/new-pm.ll Deleted: vendor/llvm/dist/include/llvm/DebugInfo/CodeView/CVSymbolTypes.def vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeRecords.def vendor/llvm/dist/test/CodeGen/PowerPC/pristine-and-livein.mir vendor/llvm/dist/test/ThinLTO/X86/error-newpm.ll vendor/llvm/dist/test/Transforms/GVN/PRE/phi-translate-2.ll vendor/llvm/dist/tools/llvm-pdbdump/YamlSerializationContext.h vendor/llvm/dist/tools/llvm-pdbdump/YamlSymbolDumper.cpp vendor/llvm/dist/tools/llvm-pdbdump/YamlSymbolDumper.h vendor/llvm/dist/tools/llvm-pdbdump/YamlTypeDumper.cpp vendor/llvm/dist/tools/llvm-pdbdump/YamlTypeDumper.h Modified: vendor/llvm/dist/docs/Vectorizers.rst vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfoImpl.h vendor/llvm/dist/include/llvm/Analysis/ValueTracking.h vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h vendor/llvm/dist/include/llvm/CodeGen/ISDOpcodes.h vendor/llvm/dist/include/llvm/CodeGen/MIRYamlMapping.h vendor/llvm/dist/include/llvm/CodeGen/MachineBasicBlock.h vendor/llvm/dist/include/llvm/CodeGen/MachineConstantPool.h vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h vendor/llvm/dist/include/llvm/CodeGen/MachineFunctionInitializer.h vendor/llvm/dist/include/llvm/CodeGen/MachineInstr.h vendor/llvm/dist/include/llvm/CodeGen/MachineInstrBundleIterator.h vendor/llvm/dist/include/llvm/CodeGen/MachineLoopInfo.h vendor/llvm/dist/include/llvm/CodeGen/MachineModuleInfo.h vendor/llvm/dist/include/llvm/CodeGen/Passes.h vendor/llvm/dist/include/llvm/CodeGen/TargetPassConfig.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/CodeView.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/SymbolDeserializer.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/SymbolRecord.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/SymbolRecordMapping.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/SymbolSerializer.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/SymbolVisitorCallbackPipeline.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/SymbolVisitorCallbacks.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeDatabaseVisitor.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeDeserializer.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeDumpVisitor.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeRecord.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeRecordMapping.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeSerializer.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeTableBuilder.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeVisitorCallbackPipeline.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h vendor/llvm/dist/include/llvm/DebugInfo/DIContext.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFContext.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/RawConstants.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/TpiHashing.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/PDBContext.h vendor/llvm/dist/include/llvm/IR/Attributes.h vendor/llvm/dist/include/llvm/IR/Function.h vendor/llvm/dist/include/llvm/IR/Instructions.h vendor/llvm/dist/include/llvm/InitializePasses.h vendor/llvm/dist/include/llvm/Object/WindowsResource.h vendor/llvm/dist/include/llvm/Passes/PassBuilder.h vendor/llvm/dist/include/llvm/Support/ARMTargetParser.def vendor/llvm/dist/include/llvm/Support/BinaryStreamReader.h vendor/llvm/dist/include/llvm/Support/YAMLTraits.h vendor/llvm/dist/include/llvm/TableGen/Record.h vendor/llvm/dist/include/llvm/Target/TargetLowering.h vendor/llvm/dist/include/llvm/Target/TargetMachine.h vendor/llvm/dist/include/llvm/Transforms/Scalar/GVN.h vendor/llvm/dist/include/llvm/Transforms/Utils/CodeExtractor.h vendor/llvm/dist/include/llvm/module.modulemap vendor/llvm/dist/lib/Analysis/CFLGraph.h vendor/llvm/dist/lib/Analysis/ConstantFolding.cpp vendor/llvm/dist/lib/Analysis/EHPersonalities.cpp vendor/llvm/dist/lib/Analysis/InstructionSimplify.cpp vendor/llvm/dist/lib/Analysis/MemoryDependenceAnalysis.cpp vendor/llvm/dist/lib/Analysis/ScalarEvolution.cpp vendor/llvm/dist/lib/Analysis/TargetTransformInfo.cpp vendor/llvm/dist/lib/Analysis/ValueTracking.cpp vendor/llvm/dist/lib/Bitcode/Writer/BitcodeWriter.cpp vendor/llvm/dist/lib/CodeGen/AggressiveAntiDepBreaker.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/AsmPrinter.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/EHStreamer.cpp vendor/llvm/dist/lib/CodeGen/CMakeLists.txt vendor/llvm/dist/lib/CodeGen/CodeGen.cpp vendor/llvm/dist/lib/CodeGen/CodeGenPrepare.cpp vendor/llvm/dist/lib/CodeGen/CriticalAntiDepBreaker.cpp vendor/llvm/dist/lib/CodeGen/GlobalISel/Localizer.cpp vendor/llvm/dist/lib/CodeGen/ImplicitNullChecks.cpp vendor/llvm/dist/lib/CodeGen/MIRParser/MIRParser.cpp vendor/llvm/dist/lib/CodeGen/MIRPrinter.cpp vendor/llvm/dist/lib/CodeGen/MachineBasicBlock.cpp vendor/llvm/dist/lib/CodeGen/MachineInstr.cpp vendor/llvm/dist/lib/CodeGen/MachineModuleInfo.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeTypes.h vendor/llvm/dist/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp vendor/llvm/dist/lib/CodeGen/TargetLoweringBase.cpp vendor/llvm/dist/lib/CodeGen/TargetPassConfig.cpp vendor/llvm/dist/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp vendor/llvm/dist/lib/DebugInfo/CodeView/CVTypeVisitor.cpp vendor/llvm/dist/lib/DebugInfo/CodeView/EnumTables.cpp vendor/llvm/dist/lib/DebugInfo/CodeView/SymbolDumper.cpp vendor/llvm/dist/lib/DebugInfo/CodeView/TypeDumpVisitor.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFContext.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/InfoStream.cpp vendor/llvm/dist/lib/DebugInfo/PDB/PDBContext.cpp vendor/llvm/dist/lib/Fuzzer/test/dump_coverage.test vendor/llvm/dist/lib/IR/Attributes.cpp vendor/llvm/dist/lib/IR/Function.cpp vendor/llvm/dist/lib/IR/Instructions.cpp vendor/llvm/dist/lib/LTO/LTOBackend.cpp vendor/llvm/dist/lib/MC/MCCodeView.cpp vendor/llvm/dist/lib/Object/MachOObjectFile.cpp vendor/llvm/dist/lib/Object/WindowsResource.cpp vendor/llvm/dist/lib/ObjectYAML/CMakeLists.txt vendor/llvm/dist/lib/ObjectYAML/LLVMBuild.txt vendor/llvm/dist/lib/Passes/PassBuilder.cpp vendor/llvm/dist/lib/Support/BinaryStreamReader.cpp vendor/llvm/dist/lib/Support/Unix/Path.inc vendor/llvm/dist/lib/TableGen/Record.cpp vendor/llvm/dist/lib/TableGen/TGParser.cpp vendor/llvm/dist/lib/TableGen/TGParser.h vendor/llvm/dist/lib/Target/AArch64/AArch64.td vendor/llvm/dist/lib/Target/AArch64/AArch64SchedM1.td vendor/llvm/dist/lib/Target/AArch64/AArch64TargetMachine.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUTargetMachine.h vendor/llvm/dist/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp vendor/llvm/dist/lib/Target/AMDGPU/DSInstructions.td vendor/llvm/dist/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp vendor/llvm/dist/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h vendor/llvm/dist/lib/Target/AMDGPU/SIDefines.h vendor/llvm/dist/lib/Target/AMDGPU/SIInsertWaitcnts.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIInstrInfo.td vendor/llvm/dist/lib/Target/AMDGPU/SIRegisterInfo.h vendor/llvm/dist/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp vendor/llvm/dist/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h vendor/llvm/dist/lib/Target/ARM/ARMExpandPseudoInsts.cpp vendor/llvm/dist/lib/Target/ARM/ARMFrameLowering.cpp vendor/llvm/dist/lib/Target/ARM/ARMInstrThumb.td vendor/llvm/dist/lib/Target/ARM/ARMInstrThumb2.td vendor/llvm/dist/lib/Target/ARM/ARMTargetMachine.cpp vendor/llvm/dist/lib/Target/ARM/ARMTargetMachine.h vendor/llvm/dist/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp vendor/llvm/dist/lib/Target/ARM/Thumb1FrameLowering.cpp vendor/llvm/dist/lib/Target/AVR/AVRISelLowering.cpp vendor/llvm/dist/lib/Target/AVR/AVRInstrInfo.td vendor/llvm/dist/lib/Target/AVR/AVRTargetMachine.cpp vendor/llvm/dist/lib/Target/AVR/AVRTargetMachine.h vendor/llvm/dist/lib/Target/BPF/BPFTargetMachine.cpp vendor/llvm/dist/lib/Target/BPF/CMakeLists.txt vendor/llvm/dist/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonISelLowering.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonInstrInfo.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonInstrInfo.h vendor/llvm/dist/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonPatterns.td vendor/llvm/dist/lib/Target/Hexagon/HexagonTargetMachine.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp vendor/llvm/dist/lib/Target/Lanai/LanaiTargetMachine.cpp vendor/llvm/dist/lib/Target/Lanai/LanaiTargetMachine.h vendor/llvm/dist/lib/Target/MSP430/MSP430TargetMachine.cpp vendor/llvm/dist/lib/Target/Mips/Mips16FrameLowering.cpp vendor/llvm/dist/lib/Target/Mips/MipsTargetMachine.cpp vendor/llvm/dist/lib/Target/Mips/MipsTargetMachine.h vendor/llvm/dist/lib/Target/NVPTX/NVPTXTargetMachine.cpp vendor/llvm/dist/lib/Target/NVPTX/NVPTXTargetMachine.h vendor/llvm/dist/lib/Target/PowerPC/PPCISelDAGToDAG.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCISelLowering.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCISelLowering.h vendor/llvm/dist/lib/Target/PowerPC/PPCInstr64Bit.td vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.h vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.td vendor/llvm/dist/lib/Target/PowerPC/PPCInstrVSX.td vendor/llvm/dist/lib/Target/PowerPC/PPCTargetMachine.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCTargetMachine.h vendor/llvm/dist/lib/Target/PowerPC/PPCTargetTransformInfo.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCTargetTransformInfo.h vendor/llvm/dist/lib/Target/RISCV/RISCVTargetMachine.cpp vendor/llvm/dist/lib/Target/Sparc/SparcTargetMachine.cpp vendor/llvm/dist/lib/Target/Sparc/SparcTargetMachine.h vendor/llvm/dist/lib/Target/SystemZ/SystemZTargetMachine.cpp vendor/llvm/dist/lib/Target/SystemZ/SystemZTargetMachine.h vendor/llvm/dist/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp vendor/llvm/dist/lib/Target/X86/InstPrinter/X86InstComments.cpp vendor/llvm/dist/lib/Target/X86/X86FloatingPoint.cpp vendor/llvm/dist/lib/Target/X86/X86FrameLowering.cpp vendor/llvm/dist/lib/Target/X86/X86ISelDAGToDAG.cpp vendor/llvm/dist/lib/Target/X86/X86ISelLowering.cpp vendor/llvm/dist/lib/Target/X86/X86ISelLowering.h vendor/llvm/dist/lib/Target/X86/X86InstrInfo.cpp vendor/llvm/dist/lib/Target/X86/X86TargetMachine.cpp vendor/llvm/dist/lib/Target/X86/X86TargetMachine.h vendor/llvm/dist/lib/Target/XCore/XCoreTargetMachine.cpp vendor/llvm/dist/lib/Transforms/Coroutines/CoroCleanup.cpp vendor/llvm/dist/lib/Transforms/Coroutines/CoroEarly.cpp vendor/llvm/dist/lib/Transforms/Coroutines/CoroElide.cpp vendor/llvm/dist/lib/Transforms/Coroutines/CoroSplit.cpp vendor/llvm/dist/lib/Transforms/IPO/PartialInlining.cpp vendor/llvm/dist/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCalls.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/PGOInstrumentation.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/SanitizerCoverage.cpp vendor/llvm/dist/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp vendor/llvm/dist/lib/Transforms/Scalar/GVN.cpp vendor/llvm/dist/lib/Transforms/Scalar/LowerExpectIntrinsic.cpp vendor/llvm/dist/lib/Transforms/Scalar/NewGVN.cpp vendor/llvm/dist/lib/Transforms/Utils/CodeExtractor.cpp vendor/llvm/dist/lib/Transforms/Utils/PredicateInfo.cpp vendor/llvm/dist/lib/Transforms/Utils/SimplifyLibCalls.cpp vendor/llvm/dist/lib/Transforms/Vectorize/LoopVectorize.cpp vendor/llvm/dist/test/Bitcode/thinlto-function-summary-callgraph.ll vendor/llvm/dist/test/CodeGen/AArch64/GlobalISel/localizer.mir vendor/llvm/dist/test/CodeGen/AArch64/GlobalISel/select-pr32733.mir vendor/llvm/dist/test/CodeGen/AArch64/misched-fusion-aes.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.ds.swizzle.ll vendor/llvm/dist/test/CodeGen/AMDGPU/merge-m0.mir vendor/llvm/dist/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir vendor/llvm/dist/test/CodeGen/ARM/cmpxchg-O0.ll vendor/llvm/dist/test/CodeGen/ARM/v6-jumptable-clobber.mir vendor/llvm/dist/test/CodeGen/AVR/rot.ll vendor/llvm/dist/test/CodeGen/MIR/Generic/multiRunPass.mir vendor/llvm/dist/test/CodeGen/Mips/compactbranches/empty-block.mir vendor/llvm/dist/test/CodeGen/PowerPC/expand-isel.ll vendor/llvm/dist/test/CodeGen/Thumb2/tbb-removeadd.mir vendor/llvm/dist/test/CodeGen/X86/2007-01-08-InstrSched.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/irtranslator-call.ll vendor/llvm/dist/test/CodeGen/X86/add-of-carry.ll vendor/llvm/dist/test/CodeGen/X86/addcarry.ll vendor/llvm/dist/test/CodeGen/X86/avg.ll vendor/llvm/dist/test/CodeGen/X86/avx.ll vendor/llvm/dist/test/CodeGen/X86/avx512-cmp-kor-sequence.ll vendor/llvm/dist/test/CodeGen/X86/avx512-gather-scatter-intrin.ll vendor/llvm/dist/test/CodeGen/X86/avx512-intrinsics-upgrade.ll vendor/llvm/dist/test/CodeGen/X86/avx512-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/avx512-mask-spills.ll vendor/llvm/dist/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll vendor/llvm/dist/test/CodeGen/X86/avx512bw-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll vendor/llvm/dist/test/CodeGen/X86/avx512cdvl-intrinsics-upgrade.ll vendor/llvm/dist/test/CodeGen/X86/avx512cdvl-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll vendor/llvm/dist/test/CodeGen/X86/avx512dq-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll vendor/llvm/dist/test/CodeGen/X86/avx512dqvl-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/avx512ifma-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/avx512ifmavl-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll vendor/llvm/dist/test/CodeGen/X86/avx512vl-intrinsics.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-and-setcc-128.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-and-setcc-256.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-setcc-128.ll vendor/llvm/dist/test/CodeGen/X86/bitcast-setcc-256.ll vendor/llvm/dist/test/CodeGen/X86/bswap_tree2.ll vendor/llvm/dist/test/CodeGen/X86/fmsubadd-combine.ll vendor/llvm/dist/test/CodeGen/X86/fold-tied-op.ll vendor/llvm/dist/test/CodeGen/X86/fp128-i128.ll vendor/llvm/dist/test/CodeGen/X86/implicit-null-checks.mir vendor/llvm/dist/test/CodeGen/X86/madd.ll vendor/llvm/dist/test/CodeGen/X86/misched-matrix.ll vendor/llvm/dist/test/CodeGen/X86/mul-constant-i16.ll vendor/llvm/dist/test/CodeGen/X86/mul-constant-i32.ll vendor/llvm/dist/test/CodeGen/X86/mul-constant-i64.ll vendor/llvm/dist/test/CodeGen/X86/oddshuffles.ll vendor/llvm/dist/test/CodeGen/X86/pmul.ll vendor/llvm/dist/test/CodeGen/X86/pr32284.ll vendor/llvm/dist/test/CodeGen/X86/rotate.ll vendor/llvm/dist/test/CodeGen/X86/sad.ll vendor/llvm/dist/test/CodeGen/X86/select.ll vendor/llvm/dist/test/CodeGen/X86/setcc-lowering.ll vendor/llvm/dist/test/CodeGen/X86/setcc-wide-types.ll vendor/llvm/dist/test/CodeGen/X86/shrink_vmul_sse.ll vendor/llvm/dist/test/CodeGen/X86/sse41.ll vendor/llvm/dist/test/CodeGen/X86/vector-bitreverse.ll vendor/llvm/dist/test/CodeGen/X86/vector-blend.ll vendor/llvm/dist/test/CodeGen/X86/x86-interleaved-access.ll vendor/llvm/dist/test/CodeGen/X86/xchg-nofold.ll vendor/llvm/dist/test/DebugInfo/MIR/X86/empty-inline.mir vendor/llvm/dist/test/DebugInfo/omit-empty.ll vendor/llvm/dist/test/Instrumentation/SanitizerCoverage/coverage-dbg.ll vendor/llvm/dist/test/Instrumentation/SanitizerCoverage/coverage.ll vendor/llvm/dist/test/Instrumentation/SanitizerCoverage/seh.ll vendor/llvm/dist/test/MC/AMDGPU/ds-err.s vendor/llvm/dist/test/MC/AMDGPU/ds.s vendor/llvm/dist/test/MC/ARM/big-endian-thumb-fixup.s vendor/llvm/dist/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt vendor/llvm/dist/test/Other/new-pm-defaults.ll vendor/llvm/dist/test/Transforms/GVN/PRE/pre-gep-load.ll vendor/llvm/dist/test/Transforms/GVN/PRE/pre-load.ll vendor/llvm/dist/test/Transforms/Inline/AArch64/gep-cost.ll vendor/llvm/dist/test/Transforms/InstCombine/ctpop.ll vendor/llvm/dist/test/Transforms/InstCombine/intrinsics.ll vendor/llvm/dist/test/Transforms/NewGVN/completeness.ll vendor/llvm/dist/test/Transforms/PGOProfile/branch1.ll vendor/llvm/dist/test/Transforms/Util/PredicateInfo/condprop.ll vendor/llvm/dist/test/Transforms/Util/PredicateInfo/testandor.ll vendor/llvm/dist/test/tools/llvm-config/cflags.test vendor/llvm/dist/test/tools/llvm-cvtres/Inputs/test_resource.rc vendor/llvm/dist/test/tools/llvm-cvtres/Inputs/test_resource.res vendor/llvm/dist/test/tools/llvm-cvtres/resource.test vendor/llvm/dist/tools/bugpoint/OptimizerDriver.cpp vendor/llvm/dist/tools/llvm-config/BuildVariables.inc.in vendor/llvm/dist/tools/llvm-config/llvm-config.cpp vendor/llvm/dist/tools/llvm-cvtres/llvm-cvtres.cpp vendor/llvm/dist/tools/llvm-dwarfdump/llvm-dwarfdump.cpp vendor/llvm/dist/tools/llvm-objdump/MachODump.cpp vendor/llvm/dist/tools/llvm-objdump/llvm-objdump.cpp vendor/llvm/dist/tools/llvm-pdbdump/Analyze.cpp vendor/llvm/dist/tools/llvm-pdbdump/CMakeLists.txt vendor/llvm/dist/tools/llvm-pdbdump/CompactTypeDumpVisitor.cpp vendor/llvm/dist/tools/llvm-pdbdump/PdbYaml.cpp vendor/llvm/dist/tools/llvm-pdbdump/PdbYaml.h vendor/llvm/dist/tools/llvm-pdbdump/YAMLOutputStyle.cpp vendor/llvm/dist/tools/llvm-pdbdump/YAMLOutputStyle.h vendor/llvm/dist/tools/llvm-pdbdump/llvm-pdbdump.cpp vendor/llvm/dist/tools/llvm-readobj/ELFDumper.cpp vendor/llvm/dist/tools/obj2yaml/macho2yaml.cpp vendor/llvm/dist/tools/opt/NewPMDriver.cpp vendor/llvm/dist/tools/opt/NewPMDriver.h vendor/llvm/dist/tools/opt/opt.cpp vendor/llvm/dist/unittests/ADT/ArrayRefTest.cpp vendor/llvm/dist/unittests/IR/AttributesTest.cpp vendor/llvm/dist/unittests/Support/TargetParserTest.cpp vendor/llvm/dist/utils/TableGen/AsmMatcherEmitter.cpp vendor/llvm/dist/utils/TableGen/AsmWriterEmitter.cpp vendor/llvm/dist/utils/TableGen/Attributes.cpp vendor/llvm/dist/utils/TableGen/CodeEmitterGen.cpp vendor/llvm/dist/utils/TableGen/CodeGenDAGPatterns.cpp vendor/llvm/dist/utils/TableGen/CodeGenDAGPatterns.h vendor/llvm/dist/utils/TableGen/CodeGenRegisters.cpp vendor/llvm/dist/utils/TableGen/CodeGenRegisters.h vendor/llvm/dist/utils/TableGen/CodeGenSchedule.cpp vendor/llvm/dist/utils/TableGen/FixedLenDecoderEmitter.cpp vendor/llvm/dist/utils/TableGen/GlobalISelEmitter.cpp vendor/llvm/dist/utils/TableGen/OptParserEmitter.cpp vendor/llvm/dist/utils/TableGen/RegisterBankEmitter.cpp vendor/llvm/dist/utils/TableGen/RegisterInfoEmitter.cpp vendor/llvm/dist/utils/TableGen/SearchableTableEmitter.cpp vendor/llvm/dist/utils/TableGen/SubtargetEmitter.cpp vendor/llvm/dist/utils/TableGen/X86FoldTablesEmitter.cpp Modified: vendor/llvm/dist/docs/Vectorizers.rst ============================================================================== --- vendor/llvm/dist/docs/Vectorizers.rst Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/docs/Vectorizers.rst Thu Jun 1 20:58:36 2017 (r319461) @@ -44,12 +44,12 @@ Users can control the vectorization SIMD width using t $ clang -mllvm -force-vector-width=8 ... $ opt -loop-vectorize -force-vector-width=8 ... -Users can control the unroll factor using the command line flag "-force-vector-unroll" +Users can control the unroll factor using the command line flag "-force-vector-interleave" .. code-block:: console - $ clang -mllvm -force-vector-unroll=2 ... - $ opt -loop-vectorize -force-vector-unroll=2 ... + $ clang -mllvm -force-vector-interleave=2 ... + $ opt -loop-vectorize -force-vector-interleave=2 ... Pragma loop hint directives ^^^^^^^^^^^^^^^^^^^^^^^^^^^ Modified: vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h Thu Jun 1 20:58:36 2017 (r319461) @@ -454,6 +454,9 @@ class TargetTransformInfo { (public) /// \brief Don't restrict interleaved unrolling to small loops. bool enableAggressiveInterleaving(bool LoopHasReductions) const; + /// \brief Enable inline expansion of memcmp + bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) const; + /// \brief Enable matching of interleaved access groups. bool enableInterleavedAccessVectorization() const; @@ -828,6 +831,7 @@ class TargetTransformInfo::Concept { (public) unsigned VF) = 0; virtual bool supportsEfficientVectorElementLoadStore() = 0; virtual bool enableAggressiveInterleaving(bool LoopHasReductions) = 0; + virtual bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) = 0; virtual bool enableInterleavedAccessVectorization() = 0; virtual bool isFPVectorizationPotentiallyUnsafe() = 0; virtual bool allowsMisalignedMemoryAccesses(LLVMContext &Context, @@ -1046,6 +1050,9 @@ class TargetTransformInfo::Model final : public Target bool enableAggressiveInterleaving(bool LoopHasReductions) override { return Impl.enableAggressiveInterleaving(LoopHasReductions); + } + bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) override { + return Impl.expandMemCmp(I, MaxLoadSize); } bool enableInterleavedAccessVectorization() override { return Impl.enableInterleavedAccessVectorization(); Modified: vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfoImpl.h ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfoImpl.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfoImpl.h Thu Jun 1 20:58:36 2017 (r319461) @@ -274,6 +274,8 @@ class TargetTransformInfoImplBase { (public) bool enableAggressiveInterleaving(bool LoopHasReductions) { return false; } + bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) { return false; } + bool enableInterleavedAccessVectorization() { return false; } bool isFPVectorizationPotentiallyUnsafe() { return false; } Modified: vendor/llvm/dist/include/llvm/Analysis/ValueTracking.h ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/ValueTracking.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/Analysis/ValueTracking.h Thu Jun 1 20:58:36 2017 (r319461) @@ -85,6 +85,8 @@ template class ArrayRef; const Instruction *CxtI = nullptr, const DominatorTree *DT = nullptr); + bool isOnlyUsedInZeroEqualityComparison(const Instruction *CxtI); + /// Return true if the given value is known to be non-zero when defined. For /// vectors, return true if every element is known to be non-zero when /// defined. For pointers, if the context instruction and dominator tree are Modified: vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h Thu Jun 1 20:58:36 2017 (r319461) @@ -396,7 +396,7 @@ class RegisterBankInfo { (protected) mutable DenseMap> MapOfInstructionMappings; - /// Create a RegisterBankInfo that can accomodate up to \p NumRegBanks + /// Create a RegisterBankInfo that can accommodate up to \p NumRegBanks /// RegisterBank instances. RegisterBankInfo(RegisterBank **RegBanks, unsigned NumRegBanks); Modified: vendor/llvm/dist/include/llvm/CodeGen/ISDOpcodes.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/ISDOpcodes.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/CodeGen/ISDOpcodes.h Thu Jun 1 20:58:36 2017 (r319461) @@ -410,11 +410,21 @@ namespace ISD { /// then the result type must also be a vector type. SETCC, - /// Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but + /// Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, and /// op #2 is a *carry value*. This operator checks the result of /// "LHS - RHS - Carry", and can be used to compare two wide integers: /// (setcce lhshi rhshi (subc lhslo rhslo) cc). Only valid for integers. + /// FIXME: This node is deprecated in favor of SETCCCARRY. + /// It is kept around for now to provide a smooth transition path + /// toward the use of SETCCCARRY and will eventually be removed. SETCCE, + + /// Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but + /// op #2 is a boolean indicating if there is an incoming carry. This + /// operator checks the result of "LHS - RHS - Carry", and can be used to + /// compare two wide integers: (setcce lhshi rhshi (subc lhslo rhslo) cc). + /// Only valid for integers. + SETCCCARRY, /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded /// integer shift operations. The operation ordering is: Modified: vendor/llvm/dist/include/llvm/CodeGen/MIRYamlMapping.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MIRYamlMapping.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/CodeGen/MIRYamlMapping.h Thu Jun 1 20:58:36 2017 (r319461) @@ -381,7 +381,6 @@ struct MachineFunction { StringRef Name; unsigned Alignment = 0; bool ExposesReturnsTwice = false; - bool NoVRegs; // GISel MachineFunctionProperties. bool Legalized = false; bool RegBankSelected = false; @@ -406,7 +405,6 @@ template <> struct MappingTraits { YamlIO.mapRequired("name", MF.Name); YamlIO.mapOptional("alignment", MF.Alignment); YamlIO.mapOptional("exposesReturnsTwice", MF.ExposesReturnsTwice); - YamlIO.mapOptional("noVRegs", MF.NoVRegs); YamlIO.mapOptional("legalized", MF.Legalized); YamlIO.mapOptional("regBankSelected", MF.RegBankSelected); YamlIO.mapOptional("selected", MF.Selected); Modified: vendor/llvm/dist/include/llvm/CodeGen/MachineBasicBlock.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MachineBasicBlock.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/CodeGen/MachineBasicBlock.h Thu Jun 1 20:58:36 2017 (r319461) @@ -335,6 +335,9 @@ class MachineBasicBlock (public) return make_range(livein_begin(), livein_end()); } + /// Remove entry from the livein set and return iterator to the next. + livein_iterator removeLiveIn(livein_iterator I); + /// Get the clobber mask for the start of this basic block. Funclets use this /// to prevent register allocation across funclet transitions. const uint32_t *getBeginClobberMask(const TargetRegisterInfo *TRI) const; Modified: vendor/llvm/dist/include/llvm/CodeGen/MachineConstantPool.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MachineConstantPool.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/CodeGen/MachineConstantPool.h Thu Jun 1 20:58:36 2017 (r319461) @@ -1,4 +1,4 @@ -//===-- CodeGen/MachineConstantPool.h - Abstract Constant Pool --*- C++ -*-===// +//===- CodeGen/MachineConstantPool.h - Abstract Constant Pool ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -18,29 +18,28 @@ #include "llvm/ADT/DenseSet.h" #include "llvm/MC/SectionKind.h" -#include #include #include namespace llvm { class Constant; -class FoldingSetNodeID; class DataLayout; -class TargetMachine; -class Type; +class FoldingSetNodeID; class MachineConstantPool; class raw_ostream; +class Type; /// Abstract base class for all machine specific constantpool value subclasses. /// class MachineConstantPoolValue { virtual void anchor(); + Type *Ty; public: explicit MachineConstantPoolValue(Type *ty) : Ty(ty) {} - virtual ~MachineConstantPoolValue() {} + virtual ~MachineConstantPoolValue() = default; /// getType - get type of this MachineConstantPoolValue. /// @@ -81,6 +80,7 @@ class MachineConstantPoolEntry { (public) : Alignment(A) { Val.ConstVal = V; } + MachineConstantPoolEntry(MachineConstantPoolValue *V, unsigned A) : Alignment(A) { Val.MachineCPVal = V; @@ -153,13 +153,12 @@ class MachineConstantPool { (public) /// print - Used by the MachineFunction printer to print information about /// constant pool objects. Implemented in MachineFunction.cpp - /// void print(raw_ostream &OS) const; /// dump - Call print(cerr) to be called from the debugger. void dump() const; }; -} // End llvm namespace +} // end namespace llvm -#endif +#endif // LLVM_CODEGEN_MACHINECONSTANTPOOL_H Modified: vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h Thu Jun 1 20:58:36 2017 (r319461) @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/MachineFunction.h --------------------------*- C++ -*-===// +//===- llvm/CodeGen/MachineFunction.h ---------------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -18,38 +18,61 @@ #ifndef LLVM_CODEGEN_MACHINEFUNCTION_H #define LLVM_CODEGEN_MACHINEFUNCTION_H +#include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/BitVector.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/GraphTraits.h" #include "llvm/ADT/ilist.h" +#include "llvm/ADT/iterator.h" #include "llvm/ADT/Optional.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" #include "llvm/Analysis/EHPersonalities.h" #include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineMemOperand.h" #include "llvm/IR/DebugLoc.h" +#include "llvm/IR/Instructions.h" #include "llvm/IR/Metadata.h" #include "llvm/MC/MCDwarf.h" #include "llvm/MC/MCSymbol.h" #include "llvm/Support/Allocator.h" #include "llvm/Support/ArrayRecycler.h" +#include "llvm/Support/AtomicOrdering.h" #include "llvm/Support/Compiler.h" +#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Recycler.h" +#include +#include +#include +#include +#include namespace llvm { -class Value; +class BasicBlock; +class BlockAddress; +class DataLayout; +class DIExpression; +class DILocalVariable; +class DILocation; class Function; -class GCModuleInfo; -class MachineRegisterInfo; -class MachineFrameInfo; +class GlobalValue; class MachineConstantPool; +class MachineFrameInfo; +class MachineFunction; class MachineJumpTableInfo; class MachineModuleInfo; +class MachineRegisterInfo; class MCContext; +class MCInstrDesc; class Pass; class PseudoSourceValueManager; +class raw_ostream; +class SlotIndexes; class TargetMachine; -class TargetSubtargetInfo; class TargetRegisterClass; -struct MachinePointerInfo; +class TargetSubtargetInfo; struct WinEHFuncInfo; template <> struct ilist_alloc_traits { @@ -137,27 +160,33 @@ class MachineFunctionProperties { (public) bool hasProperty(Property P) const { return Properties[static_cast(P)]; } + MachineFunctionProperties &set(Property P) { Properties.set(static_cast(P)); return *this; } + MachineFunctionProperties &reset(Property P) { Properties.reset(static_cast(P)); return *this; } + /// Reset all the properties. MachineFunctionProperties &reset() { Properties.reset(); return *this; } + MachineFunctionProperties &set(const MachineFunctionProperties &MFP) { Properties |= MFP.Properties; return *this; } + MachineFunctionProperties &reset(const MachineFunctionProperties &MFP) { Properties.reset(MFP.Properties); return *this; } + // Returns true if all properties set in V (i.e. required by a pass) are set // in this. bool verifyRequiredProperties(const MachineFunctionProperties &V) const { @@ -180,18 +209,17 @@ struct SEHHandler { const BlockAddress *RecoverBA; }; - /// This structure is used to retain landing pad info for the current function. struct LandingPadInfo { MachineBasicBlock *LandingPadBlock; // Landing pad block. SmallVector BeginLabels; // Labels prior to invoke. SmallVector EndLabels; // Labels after invoke. SmallVector SEHHandlers; // SEH handlers active at this lpad. - MCSymbol *LandingPadLabel; // Label at beginning of landing pad. - std::vector TypeIds; // List of type ids (filters negative). + MCSymbol *LandingPadLabel = nullptr; // Label at beginning of landing pad. + std::vector TypeIds; // List of type ids (filters negative). explicit LandingPadInfo(MachineBasicBlock *MBB) - : LandingPadBlock(MBB), LandingPadLabel(nullptr) {} + : LandingPadBlock(MBB) {} }; class MachineFunction { @@ -239,7 +267,7 @@ class MachineFunction { Recycler BasicBlockRecycler; // List of machine basic blocks in function - typedef ilist BasicBlockListType; + using BasicBlockListType = ilist; BasicBlockListType BasicBlocks; /// FunctionNumber - This provides a unique ID for each function emitted in @@ -281,7 +309,7 @@ class MachineFunction { std::vector LandingPads; /// Map a landing pad's EH symbol to the call site indexes. - DenseMap > LPadToCallSiteMap; + DenseMap> LPadToCallSiteMap; /// Map of invoke call site index values to associated begin EH_LABEL. DenseMap CallSiteMap; @@ -303,9 +331,6 @@ class MachineFunction { /// \} - MachineFunction(const MachineFunction &) = delete; - void operator=(const MachineFunction&) = delete; - /// Clear all the members of this MachineFunction, but the ones used /// to initialize again the MachineFunction. /// More specifically, this deallocates all the dynamically allocated @@ -316,8 +341,8 @@ class MachineFunction { /// In particular, the XXXInfo data structure. /// \pre Fn, Target, MMI, and FunctionNumber are properly set. void init(); -public: +public: struct VariableDbgInfo { const DILocalVariable *Var; const DIExpression *Expr; @@ -328,11 +353,13 @@ class MachineFunction { unsigned Slot, const DILocation *Loc) : Var(Var), Expr(Expr), Slot(Slot), Loc(Loc) {} }; - typedef SmallVector VariableDbgInfoMapTy; + using VariableDbgInfoMapTy = SmallVector; VariableDbgInfoMapTy VariableDbgInfos; MachineFunction(const Function *Fn, const TargetMachine &TM, unsigned FunctionNum, MachineModuleInfo &MMI); + MachineFunction(const MachineFunction &) = delete; + MachineFunction &operator=(const MachineFunction &) = delete; ~MachineFunction(); /// Reset the instance as if it was just created. @@ -350,19 +377,15 @@ class MachineFunction { const DataLayout &getDataLayout() const; /// getFunction - Return the LLVM function that this machine code represents - /// const Function *getFunction() const { return Fn; } /// getName - Return the name of the corresponding LLVM function. - /// StringRef getName() const; /// getFunctionNumber - Return a unique ID for the current function. - /// unsigned getFunctionNumber() const { return FunctionNumber; } /// getTarget - Return the target machine this machine code is compiled with - /// const TargetMachine &getTarget() const { return Target; } /// getSubtarget - Return the subtarget for which this machine code is being @@ -378,14 +401,12 @@ class MachineFunction { } /// getRegInfo - Return information about the registers currently in use. - /// MachineRegisterInfo &getRegInfo() { return *RegInfo; } const MachineRegisterInfo &getRegInfo() const { return *RegInfo; } /// getFrameInfo - Return the frame info object for the current function. /// This object contains information about objects allocated on the stack /// frame of the current function in an abstract way. - /// MachineFrameInfo &getFrameInfo() { return *FrameInfo; } const MachineFrameInfo &getFrameInfo() const { return *FrameInfo; } @@ -402,7 +423,6 @@ class MachineFunction { /// getConstantPool - Return the constant pool object for the current /// function. - /// MachineConstantPool *getConstantPool() { return ConstantPool; } const MachineConstantPool *getConstantPool() const { return ConstantPool; } @@ -413,11 +433,9 @@ class MachineFunction { WinEHFuncInfo *getWinEHFuncInfo() { return WinEHInfo; } /// getAlignment - Return the alignment (log2, not bytes) of the function. - /// unsigned getAlignment() const { return Alignment; } /// setAlignment - Set the alignment (log2, not bytes) of the function. - /// void setAlignment(unsigned A) { Alignment = A; } /// ensureAlignment - Make sure the function is at least 1 << A bytes aligned. @@ -487,7 +505,6 @@ class MachineFunction { bool shouldSplitStack() const; /// getNumBlockIDs - Return the number of MBB ID's allocated. - /// unsigned getNumBlockIDs() const { return (unsigned)MBBNumbering.size(); } /// RenumberBlocks - This discards all of the MachineBasicBlock numbers and @@ -499,7 +516,6 @@ class MachineFunction { /// print - Print out the MachineFunction in a format suitable for debugging /// to the specified stream. - /// void print(raw_ostream &OS, const SlotIndexes* = nullptr) const; /// viewCFG - This function is meant for use from the debugger. You can just @@ -507,7 +523,6 @@ class MachineFunction { /// program, displaying the CFG of the current function with the code for each /// basic block inside. This depends on there being a 'dot' and 'gv' program /// in your path. - /// void viewCFG() const; /// viewCFGOnly - This function is meant for use from the debugger. It works @@ -518,7 +533,6 @@ class MachineFunction { void viewCFGOnly() const; /// dump - Print the current MachineFunction to cerr, useful for debugger use. - /// void dump() const; /// Run the current MachineFunction through the machine code verifier, useful @@ -528,10 +542,10 @@ class MachineFunction { bool AbortOnError = true) const; // Provide accessors for the MachineBasicBlock list... - typedef BasicBlockListType::iterator iterator; - typedef BasicBlockListType::const_iterator const_iterator; - typedef BasicBlockListType::const_reverse_iterator const_reverse_iterator; - typedef BasicBlockListType::reverse_iterator reverse_iterator; + using iterator = BasicBlockListType::iterator; + using const_iterator = BasicBlockListType::const_iterator; + using const_reverse_iterator = BasicBlockListType::const_reverse_iterator; + using reverse_iterator = BasicBlockListType::reverse_iterator; /// Support for MachineBasicBlock::getNextNode(). static BasicBlockListType MachineFunction::* @@ -590,11 +604,9 @@ class MachineFunction { //===--------------------------------------------------------------------===// // Internal functions used to automatically number MachineBasicBlocks - // /// \brief Adds the MBB to the internal numbering. Returns the unique number /// assigned to the MBB. - /// unsigned addToMBBNumbering(MachineBasicBlock *MBB) { MBBNumbering.push_back(MBB); return (unsigned)MBBNumbering.size()-1; @@ -610,7 +622,6 @@ class MachineFunction { /// CreateMachineInstr - Allocate a new MachineInstr. Use this instead /// of `new MachineInstr'. - /// MachineInstr *CreateMachineInstr(const MCInstrDesc &MCID, const DebugLoc &DL, bool NoImp = false); @@ -623,16 +634,13 @@ class MachineFunction { MachineInstr *CloneMachineInstr(const MachineInstr *Orig); /// DeleteMachineInstr - Delete the given MachineInstr. - /// void DeleteMachineInstr(MachineInstr *MI); /// CreateMachineBasicBlock - Allocate a new MachineBasicBlock. Use this /// instead of `new MachineBasicBlock'. - /// MachineBasicBlock *CreateMachineBasicBlock(const BasicBlock *bb = nullptr); /// DeleteMachineBasicBlock - Delete the given MachineBasicBlock. - /// void DeleteMachineBasicBlock(MachineBasicBlock *MBB); /// getMachineMemOperand - Allocate a new MachineMemOperand. @@ -653,7 +661,7 @@ class MachineFunction { MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO, int64_t Offset, uint64_t Size); - typedef ArrayRecycler::Capacity OperandCapacity; + using OperandCapacity = ArrayRecycler::Capacity; /// Allocate an array of MachineOperands. This is only intended for use by /// internal MachineInstr functions. @@ -700,7 +708,6 @@ class MachineFunction { //===--------------------------------------------------------------------===// // Label Manipulation. - // /// getJTISymbol - Return the MCSymbol for the specified non-empty jump table. /// If isLinkerPrivate is specified, an 'l' label is returned, otherwise a @@ -858,13 +865,16 @@ template <> struct GraphTraits : static NodeRef getEntryNode(MachineFunction *F) { return &F->front(); } // nodes_iterator/begin/end - Allow iteration over all nodes in the graph - typedef pointer_iterator nodes_iterator; + using nodes_iterator = pointer_iterator; + static nodes_iterator nodes_begin(MachineFunction *F) { return nodes_iterator(F->begin()); } + static nodes_iterator nodes_end(MachineFunction *F) { return nodes_iterator(F->end()); } + static unsigned size (MachineFunction *F) { return F->size(); } }; template <> struct GraphTraits : @@ -872,37 +882,39 @@ template <> struct GraphTraits static NodeRef getEntryNode(const MachineFunction *F) { return &F->front(); } // nodes_iterator/begin/end - Allow iteration over all nodes in the graph - typedef pointer_iterator nodes_iterator; + using nodes_iterator = pointer_iterator; + static nodes_iterator nodes_begin(const MachineFunction *F) { return nodes_iterator(F->begin()); } + static nodes_iterator nodes_end (const MachineFunction *F) { return nodes_iterator(F->end()); } + static unsigned size (const MachineFunction *F) { return F->size(); } }; - // Provide specializations of GraphTraits to be able to treat a function as a // graph of basic blocks... and to walk it in inverse order. Inverse order for // a function is considered to be when traversing the predecessor edges of a BB // instead of the successor edges. // -template <> struct GraphTraits > : - public GraphTraits > { +template <> struct GraphTraits> : + public GraphTraits> { static NodeRef getEntryNode(Inverse G) { return &G.Graph->front(); } }; -template <> struct GraphTraits > : - public GraphTraits > { +template <> struct GraphTraits> : + public GraphTraits> { static NodeRef getEntryNode(Inverse G) { return &G.Graph->front(); } }; -} // End llvm namespace +} // end namespace llvm -#endif +#endif // LLVM_CODEGEN_MACHINEFUNCTION_H Modified: vendor/llvm/dist/include/llvm/CodeGen/MachineFunctionInitializer.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MachineFunctionInitializer.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/CodeGen/MachineFunctionInitializer.h Thu Jun 1 20:58:36 2017 (r319461) @@ -1,4 +1,4 @@ -//===- MachineFunctionInitializer.h - machine function initializer ---------===// +//=- MachineFunctionInitializer.h - machine function initializer --*- C++ -*-=// // // The LLVM Compiler Infrastructure // @@ -25,7 +25,7 @@ class MachineFunctionInitializer { virtual void anchor(); public: - virtual ~MachineFunctionInitializer() {} + virtual ~MachineFunctionInitializer() = default; /// Initialize the machine function. /// @@ -35,4 +35,4 @@ class MachineFunctionInitializer { } // end namespace llvm -#endif +#endif // LLVM_CODEGEN_MACHINEFUNCTIONINITIALIZER_H Modified: vendor/llvm/dist/include/llvm/CodeGen/MachineInstr.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MachineInstr.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/CodeGen/MachineInstr.h Thu Jun 1 20:58:36 2017 (r319461) @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===// +//===- llvm/CodeGen/MachineInstr.h - MachineInstr class ---------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -17,7 +17,6 @@ #define LLVM_CODEGEN_MACHINEINSTR_H #include "llvm/ADT/DenseMapInfo.h" -#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/ilist.h" #include "llvm/ADT/ilist_node.h" #include "llvm/ADT/iterator_range.h" @@ -28,19 +27,27 @@ #include "llvm/MC/MCInstrDesc.h" #include "llvm/Support/ArrayRecycler.h" #include "llvm/Target/TargetOpcodes.h" +#include +#include +#include +#include namespace llvm { -class StringRef; template class ArrayRef; -template class SmallVectorImpl; -class DILocalVariable; class DIExpression; +class DILocalVariable; +class MachineBasicBlock; +class MachineFunction; +class MachineMemOperand; +class MachineRegisterInfo; +class ModuleSlotTracker; +class raw_ostream; +template class SmallVectorImpl; +class StringRef; class TargetInstrInfo; class TargetRegisterClass; class TargetRegisterInfo; -class MachineFunction; -class MachineMemOperand; //===----------------------------------------------------------------------===// /// Representation of each machine instruction. @@ -53,7 +60,7 @@ class MachineInstr : public ilist_node_with_parent> { public: - typedef MachineMemOperand **mmo_iterator; + using mmo_iterator = MachineMemOperand **; /// Flags to specify different kinds of comments to output in /// assembly code. These flags carry semantic information not @@ -72,43 +79,39 @@ class MachineInstr BundledPred = 1 << 2, // Instruction has bundled predecessors. BundledSucc = 1 << 3 // Instruction has bundled successors. }; + private: const MCInstrDesc *MCID; // Instruction descriptor. - MachineBasicBlock *Parent; // Pointer to the owning basic block. + MachineBasicBlock *Parent = nullptr; // Pointer to the owning basic block. // Operands are allocated by an ArrayRecycler. - MachineOperand *Operands; // Pointer to the first operand. - unsigned NumOperands; // Number of operands on instruction. - typedef ArrayRecycler::Capacity OperandCapacity; + MachineOperand *Operands = nullptr; // Pointer to the first operand. + unsigned NumOperands = 0; // Number of operands on instruction. + using OperandCapacity = ArrayRecycler::Capacity; OperandCapacity CapOperands; // Capacity of the Operands array. - uint8_t Flags; // Various bits of additional + uint8_t Flags = 0; // Various bits of additional // information about machine // instruction. - uint8_t AsmPrinterFlags; // Various bits of information used by + uint8_t AsmPrinterFlags = 0; // Various bits of information used by // the AsmPrinter to emit helpful // comments. This is *not* semantic // information. Do not use this for // anything other than to convey comment // information to AsmPrinter. - uint8_t NumMemRefs; // Information on memory references. + uint8_t NumMemRefs = 0; // Information on memory references. // Note that MemRefs == nullptr, means 'don't know', not 'no memory access'. // Calling code must treat missing information conservatively. If the number // of memory operands required to be precise exceeds the maximum value of // NumMemRefs - currently 256 - we remove the operands entirely. Note also // that this is a non-owning reference to a shared copy on write buffer owned // by the MachineFunction and created via MF.allocateMemRefsArray. - mmo_iterator MemRefs; + mmo_iterator MemRefs = nullptr; DebugLoc debugLoc; // Source line information. - MachineInstr(const MachineInstr&) = delete; - void operator=(const MachineInstr&) = delete; - // Use MachineFunction::DeleteMachineInstr() instead. - ~MachineInstr() = delete; - // Intrusive list support friend struct ilist_traits; friend struct ilist_callback_traits; @@ -128,6 +131,11 @@ class MachineInstr friend class MachineFunction; public: + MachineInstr(const MachineInstr &) = delete; + MachineInstr &operator=(const MachineInstr &) = delete; + // Use MachineFunction::DeleteMachineInstr() instead. + ~MachineInstr() = delete; + const MachineBasicBlock* getParent() const { return Parent; } MachineBasicBlock* getParent() { return Parent; } @@ -178,7 +186,6 @@ class MachineInstr Flags &= ~((uint8_t)Flag); } - /// Return true if MI is in a bundle (but not the first MI in a bundle). /// /// A bundle looks like this before it's finalized: @@ -263,7 +270,6 @@ class MachineInstr /// earlier. /// /// If this method returns, the caller should try to recover from the error. - /// void emitError(StringRef Msg) const; /// Returns the target instruction descriptor of this MachineInstr. @@ -273,7 +279,6 @@ class MachineInstr unsigned getOpcode() const { return MCID->Opcode; } /// Access to explicit operands of the instruction. - /// unsigned getNumOperands() const { return NumOperands; } const MachineOperand& getOperand(unsigned i) const { @@ -289,8 +294,8 @@ class MachineInstr unsigned getNumExplicitOperands() const; /// iterator/begin/end - Iterate over all operands of a machine instruction. - typedef MachineOperand *mop_iterator; - typedef const MachineOperand *const_mop_iterator; + using mop_iterator = MachineOperand *; + using const_mop_iterator = const MachineOperand *; mop_iterator operands_begin() { return Operands; } mop_iterator operands_end() { return Operands + NumOperands; } @@ -713,7 +718,6 @@ class MachineInstr return hasProperty(MCID::ExtraDefRegAllocReq, Type); } - enum MICheckType { CheckDefs, // Check all operands for equality CheckKillDead, // Check all operands including kill / dead markers @@ -767,6 +771,7 @@ class MachineInstr /// Returns true if the MachineInstr represents a label. bool isLabel() const { return isEHLabel() || isGCLabel(); } + bool isCFIInstruction() const { return getOpcode() == TargetOpcode::CFI_INSTRUCTION; } @@ -775,6 +780,7 @@ class MachineInstr bool isPosition() const { return isLabel() || isCFIInstruction(); } bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; } + /// A DBG_VALUE is indirect iff the first operand is a register and /// the second operand is an immediate. bool isIndirectDebugValue() const { @@ -787,29 +793,38 @@ class MachineInstr bool isKill() const { return getOpcode() == TargetOpcode::KILL; } bool isImplicitDef() const { return getOpcode()==TargetOpcode::IMPLICIT_DEF; } bool isInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM; } + bool isMSInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM && getInlineAsmDialect(); } + bool isStackAligningInlineAsm() const; InlineAsm::AsmDialect getInlineAsmDialect() const; + bool isInsertSubreg() const { return getOpcode() == TargetOpcode::INSERT_SUBREG; } + bool isSubregToReg() const { return getOpcode() == TargetOpcode::SUBREG_TO_REG; } + bool isRegSequence() const { return getOpcode() == TargetOpcode::REG_SEQUENCE; } + bool isBundle() const { return getOpcode() == TargetOpcode::BUNDLE; } + bool isCopy() const { return getOpcode() == TargetOpcode::COPY; } + bool isFullCopy() const { return isCopy() && !getOperand(0).getSubReg() && !getOperand(1).getSubReg(); } + bool isExtractSubreg() const { return getOpcode() == TargetOpcode::EXTRACT_SUBREG; } @@ -978,7 +993,6 @@ class MachineInstr /// /// The flag operand is an immediate that can be decoded with methods like /// InlineAsm::hasRegClassConstraint(). - /// int findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo = nullptr) const; /// Compute the static register class constraint for operand OpIdx. @@ -987,7 +1001,6 @@ class MachineInstr /// /// Returns NULL if the static register class constraint cannot be /// determined. - /// const TargetRegisterClass* getRegClassConstraint(unsigned OpIdx, const TargetInstrInfo *TII, @@ -1328,6 +1341,6 @@ inline raw_ostream& operator<<(raw_ostream &OS, const return OS; } -} // End llvm namespace +} // end namespace llvm -#endif +#endif // LLVM_CODEGEN_MACHINEINSTR_H Modified: vendor/llvm/dist/include/llvm/CodeGen/MachineInstrBundleIterator.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MachineInstrBundleIterator.h Thu Jun 1 20:46:43 2017 (r319460) +++ vendor/llvm/dist/include/llvm/CodeGen/MachineInstrBundleIterator.h Thu Jun 1 20:58:36 2017 (r319461) @@ -15,34 +15,37 @@ #define LLVM_CODEGEN_MACHINEINSTRBUNDLEITERATOR_H #include "llvm/ADT/ilist.h" +#include "llvm/ADT/simple_ilist.h" +#include #include +#include namespace llvm { template struct MachineInstrBundleIteratorTraits; template struct MachineInstrBundleIteratorTraits { - typedef simple_ilist> list_type; - typedef typename list_type::iterator instr_iterator; - typedef typename list_type::iterator nonconst_instr_iterator; - typedef typename list_type::const_iterator const_instr_iterator; + using list_type = simple_ilist>; + using instr_iterator = typename list_type::iterator; + using nonconst_instr_iterator = typename list_type::iterator; + using const_instr_iterator = typename list_type::const_iterator; }; template struct MachineInstrBundleIteratorTraits { - typedef simple_ilist> list_type; - typedef typename list_type::reverse_iterator instr_iterator; - typedef typename list_type::reverse_iterator nonconst_instr_iterator; - typedef typename list_type::const_reverse_iterator const_instr_iterator; + using list_type = simple_ilist>; + using instr_iterator = typename list_type::reverse_iterator; + using nonconst_instr_iterator = typename list_type::reverse_iterator; + using const_instr_iterator = typename list_type::const_reverse_iterator; }; template struct MachineInstrBundleIteratorTraits { - typedef simple_ilist> list_type; - typedef typename list_type::const_iterator instr_iterator; - typedef typename list_type::iterator nonconst_instr_iterator; - typedef typename list_type::const_iterator const_instr_iterator; + using list_type = simple_ilist>; + using instr_iterator = typename list_type::const_iterator; + using nonconst_instr_iterator = typename list_type::iterator; + using const_instr_iterator = typename list_type::const_iterator; }; template struct MachineInstrBundleIteratorTraits { - typedef simple_ilist> list_type; - typedef typename list_type::const_reverse_iterator instr_iterator; - typedef typename list_type::reverse_iterator nonconst_instr_iterator; - typedef typename list_type::const_reverse_iterator const_instr_iterator; + using list_type = simple_ilist>; + using instr_iterator = typename list_type::const_reverse_iterator; + using nonconst_instr_iterator = typename list_type::reverse_iterator; + using const_instr_iterator = typename list_type::const_reverse_iterator; }; template struct MachineInstrBundleIteratorHelper; @@ -104,27 +107,27 @@ template <> struct MachineInstrBundleIteratorHelper class MachineInstrBundleIterator : MachineInstrBundleIteratorHelper { - typedef MachineInstrBundleIteratorTraits Traits; - typedef typename Traits::instr_iterator instr_iterator; + using Traits = MachineInstrBundleIteratorTraits; + using instr_iterator = typename Traits::instr_iterator; + instr_iterator MII; public: - typedef typename instr_iterator::value_type value_type; - typedef typename instr_iterator::difference_type difference_type; - typedef typename instr_iterator::pointer pointer; - typedef typename instr_iterator::reference reference; - typedef std::bidirectional_iterator_tag iterator_category; + using value_type = typename instr_iterator::value_type; + using difference_type = typename instr_iterator::difference_type; + using pointer = typename instr_iterator::pointer; + using reference = typename instr_iterator::reference; + using const_pointer = typename instr_iterator::const_pointer; + using const_reference = typename instr_iterator::const_reference; + using iterator_category = std::bidirectional_iterator_tag; - typedef typename instr_iterator::const_pointer const_pointer; - typedef typename instr_iterator::const_reference const_reference; - private: - typedef typename Traits::nonconst_instr_iterator nonconst_instr_iterator; - typedef typename Traits::const_instr_iterator const_instr_iterator; - typedef MachineInstrBundleIterator< - typename nonconst_instr_iterator::value_type, IsReverse> - nonconst_iterator; - typedef MachineInstrBundleIterator reverse_iterator; + using nonconst_instr_iterator = typename Traits::nonconst_instr_iterator; + using const_instr_iterator = typename Traits::const_instr_iterator; + using nonconst_iterator = + MachineInstrBundleIterator; + using reverse_iterator = MachineInstrBundleIterator; public: MachineInstrBundleIterator(instr_iterator MI) : MII(MI) { @@ -138,12 +141,14 @@ class MachineInstrBundleIterator : MachineInstrBundleI "MachineInstrBundleIterator with a " "bundled MI"); } + MachineInstrBundleIterator(pointer MI) : MII(MI) { // FIXME: This conversion should be explicit. assert((!MI || !MI->isBundledWithPred()) && "It's not legal to initialize " "MachineInstrBundleIterator " "with a bundled MI"); } + // Template allows conversion from const to nonconst. template MachineInstrBundleIterator( @@ -151,6 +156,7 @@ class MachineInstrBundleIterator : MachineInstrBundleI typename std::enable_if::value, void *>::type = nullptr) : MII(I.getInstrIterator()) {} + MachineInstrBundleIterator() : MII(nullptr) {} *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***