From owner-svn-src-head@freebsd.org Wed Feb 6 03:52:16 2019 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E8E3B14DAF42; Wed, 6 Feb 2019 03:52:15 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 8F9B68246E; Wed, 6 Feb 2019 03:52:15 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 825C727CDE; Wed, 6 Feb 2019 03:52:15 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x163qFgL058196; Wed, 6 Feb 2019 03:52:15 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x163qFMA058193; Wed, 6 Feb 2019 03:52:15 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201902060352.x163qFMA058193@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Wed, 6 Feb 2019 03:52:15 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r343824 - in head/sys/powerpc: include ofw powerpc X-SVN-Group: head X-SVN-Commit-Author: jhibbits X-SVN-Commit-Paths: in head/sys/powerpc: include ofw powerpc X-SVN-Commit-Revision: 343824 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 8F9B68246E X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.97 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_MEDIUM(-1.00)[-0.999,0]; NEURAL_HAM_SHORT(-0.97)[-0.974,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US]; NEURAL_HAM_LONG(-1.00)[-0.999,0] X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 06 Feb 2019 03:52:16 -0000 Author: jhibbits Date: Wed Feb 6 03:52:14 2019 New Revision: 343824 URL: https://svnweb.freebsd.org/changeset/base/343824 Log: powerpc: Bind IRQs to only one interrupt on QorIQ SoCs The QorIQ SoCs don't actually support multicast interrupts, and the references state explicitly that multicast is undefined behavior. Avoid the undefined behavior by binding to only a single CPU, using a quirk to determine if this is necessary. MFC after: 3 weeks Modified: head/sys/powerpc/include/openpicvar.h head/sys/powerpc/ofw/openpic_ofw.c head/sys/powerpc/powerpc/openpic.c Modified: head/sys/powerpc/include/openpicvar.h ============================================================================== --- head/sys/powerpc/include/openpicvar.h Wed Feb 6 02:35:56 2019 (r343823) +++ head/sys/powerpc/include/openpicvar.h Wed Feb 6 03:52:14 2019 (r343824) @@ -34,6 +34,8 @@ #define OPENPIC_IRQMAX 256 /* h/w allows more */ +#define OPENPIC_QUIRK_SINGLE_BIND 1 /* Bind interrupts to only 1 CPU */ + /* Names match the macros in openpicreg.h. */ struct openpic_timer { uint32_t tcnt; @@ -55,6 +57,7 @@ struct openpic_softc { u_int sc_ncpu; u_int sc_nirq; int sc_psim; + u_int sc_quirks; /* Saved states. */ uint32_t sc_saved_config; Modified: head/sys/powerpc/ofw/openpic_ofw.c ============================================================================== --- head/sys/powerpc/ofw/openpic_ofw.c Wed Feb 6 02:35:56 2019 (r343823) +++ head/sys/powerpc/ofw/openpic_ofw.c Wed Feb 6 03:52:14 2019 (r343824) @@ -128,14 +128,19 @@ openpic_ofw_probe(device_t dev) static int openpic_ofw_attach(device_t dev) { + struct openpic_softc *sc; phandle_t xref, node; node = ofw_bus_get_node(dev); + sc = device_get_softc(dev); if (OF_getencprop(node, "phandle", &xref, sizeof(xref)) == -1 && OF_getencprop(node, "ibm,phandle", &xref, sizeof(xref)) == -1 && OF_getencprop(node, "linux,phandle", &xref, sizeof(xref)) == -1) xref = node; + + if (ofw_bus_is_compatible(dev, "fsl,mpic")) + sc->sc_quirks = OPENPIC_QUIRK_SINGLE_BIND; return (openpic_common_attach(dev, xref)); } Modified: head/sys/powerpc/powerpc/openpic.c ============================================================================== --- head/sys/powerpc/powerpc/openpic.c Wed Feb 6 02:35:56 2019 (r343823) +++ head/sys/powerpc/powerpc/openpic.c Wed Feb 6 03:52:14 2019 (r343824) @@ -35,6 +35,7 @@ #include #include #include +#include #include #include @@ -236,6 +237,7 @@ void openpic_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv __unused) { struct openpic_softc *sc; + uint32_t mask; /* If we aren't directly connected to the CPU, this won't work */ if (dev != root_pic) @@ -247,7 +249,23 @@ openpic_bind(device_t dev, u_int irq, cpuset_t cpumask * XXX: openpic_write() is very special and just needs a 32 bits mask. * For the moment, just play dirty and get the first half word. */ - openpic_write(sc, OPENPIC_IDEST(irq), cpumask.__bits[0] & 0xffffffff); + mask = cpumask.__bits[0] & 0xffffffff; + if (sc->sc_quirks & OPENPIC_QUIRK_SINGLE_BIND) { + int i = mftb() % CPU_COUNT(&cpumask); + int cpu, ncpu; + + ncpu = 0; + CPU_FOREACH(cpu) { + if (!(mask & (1 << cpu))) + continue; + if (ncpu == i) + break; + ncpu++; + } + mask &= (1 << cpu); + } + + openpic_write(sc, OPENPIC_IDEST(irq), mask); } void