Date: Fri, 17 Feb 2006 00:56:10 GMT From: Kip Macy <kmacy@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 91910 for review Message-ID: <200602170056.k1H0uAqN079470@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=91910 Change 91910 by kmacy@kmacy_storage:sun4v_work on 2006/02/17 00:55:18 allow SYSINIT to take care of interrupt initialization as it does on other platforms do interrupt queue allocation and registration add md_var.h to trap.c so that tl0_base is declared Affected files ... .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asi.h#7 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/intr_machdep.h#2 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcpu.h#2 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/intr_machdep.c#3 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/machdep.c#6 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/pmap.c#7 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/trap.c#4 edit Differences ... ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asi.h#7 (text+ko) ==== @@ -139,5 +139,8 @@ #define NONRESUMABLE_ERROR_QUEUE_HEAD 0x3f0 #define NONRESUMABLE_ERROR_QUEUE_TAIL 0x3f8 +#define Q(queue_head) (queue_head >> 4) + + #endif /* !_MACHINE_ASI_H_ */ ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/intr_machdep.h#2 (text+ko) ==== @@ -77,12 +77,29 @@ void intr_setup(int level, ih_func_t *ihf, int pri, iv_func_t *ivf, void *iva); -void intr_init1(void); -void intr_init2(void); int inthand_add(const char *name, int vec, void (*handler)(void *), void *arg, int flags, void **cookiep); int inthand_remove(int vec, void *cookie); +void cpu_intrq_init(void); + ih_func_t intr_fast; +#define CPU_LIST_SIZE (MAXCPU * sizeof(uint16_t)) + +#define INTR_REPORT_SIZE 64 +#define INTR_CPU_Q_SIZE (cpu_q_entries * INTR_REPORT_SIZE) +#define INTR_DEV_Q_SIZE (dev_q_entries * INTR_REPORT_SIZE) + +#define CPU_RQ_ENTRIES 64 +#define CPU_NRQ_ENTRIES 64 + +#define Q_ENTRY_SIZE 64 +#define CPU_RQ_SIZE (CPU_RQ_ENTRIES * Q_ENTRY_SIZE) +#define CPU_NRQ_SIZE (CPU_NRQ_ENTRIES * Q_ENTRY_SIZE) + + + + + #endif ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcpu.h#2 (text+ko) ==== @@ -51,6 +51,22 @@ struct intr_request *pc_irfree; \ struct pmap *pc_pmap; \ vm_offset_t pc_addr; \ + vm_offset_t *pc_mondo_data; \ + vm_offset_t *pc_cpu_list; \ + vm_offset_t *pc_cpu_q; \ + vm_offset_t *pc_dev_q; \ + vm_offset_t *pc_rq; \ + vm_offset_t *pc_nrq; \ + vm_paddr_t pc_mondo_data_ra; \ + vm_paddr_t pc_cpu_list_ra; \ + vm_paddr_t pc_cpu_q_ra; \ + uint64_t pc_cpu_q_size; \ + vm_paddr_t pc_dev_q_ra; \ + uint64_t pc_dev_q_size; \ + vm_paddr_t pc_rq_ra; \ + uint64_t pc_rq_size; \ + vm_paddr_t pc_nrq_ra; \ + uint64_t pc_nrq_size; \ u_long pc_tickref; \ u_long pc_tickadj; \ u_int pc_mid; \ @@ -59,6 +75,12 @@ u_int pc_tlb_ctx_max; \ u_int pc_tlb_ctx_min + /* XXX SUN4V_FIXME - as we access the *_ra and *_size fields in quick + * succession we _really_ want them to be L1 cache line size aligned + * and it is quite possible that we want all of ASI_QUEUE fields to + * be L2 cache aligned - they're surrounded by per-cpu data, so there is + * no possibility of false sharing, but this might help in reducing misses + */ struct pcb; struct pcpu; ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/intr_machdep.c#3 (text+ko) ==== @@ -63,10 +63,12 @@ #include <sys/param.h> #include <sys/systm.h> -#include <sys/queue.h> +#include <sys/types.h> +#include <sys/malloc.h> #include <sys/bus.h> #include <sys/errno.h> #include <sys/interrupt.h> +#include <sys/kernel.h> #include <sys/ktr.h> #include <sys/lock.h> #include <sys/mutex.h> @@ -76,7 +78,14 @@ #include <machine/frame.h> #include <machine/intr_machdep.h> +#include <machine/hypervisor_api.h> +#include <machine/cpu.h> +#include <vm/vm.h> +#include <vm/pmap.h> + +#define PANIC_IF(exp) if (unlikely(exp)) {panic("%s: %s:%d", #exp, __FILE__, __LINE__);} + #define MAX_STRAY_LOG 5 CTASSERT((1 << IV_SHIFT) == sizeof(struct intr_vector)); @@ -100,6 +109,16 @@ "tick", /* PIL_TICK */ }; + +/* + * XXX SUN4V_FIXME - the queue size values should + * really be calculated based on the size of the partition + * + */ + +int cpu_q_entries = 128; +int dev_q_entries = 128; + /* protect the intr_vectors table */ static struct mtx intr_table_lock; @@ -206,8 +225,8 @@ } } -void -intr_init1() +static void +intr_init(void) { int i; @@ -221,17 +240,13 @@ intr_vectors[i].iv_vec = i; } intr_handlers[PIL_LOW] = intr_fast; + mtx_init(&intr_table_lock, "intr table", NULL, MTX_SPIN); + + cpu_intrq_init(); + } - -void -intr_init2() -{ +SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL); - mtx_init(&intr_table_lock, "intr table", NULL, MTX_SPIN); - /* SUN4V_FIXME - declare cpu and dev mondo etc. areas - * to hypervisor here - */ -} static void intr_execute_handlers(void *cookie) @@ -346,3 +361,61 @@ } return (error); } + +/* + * Allocate and register intrq fields + */ +void +cpu_intrq_init() +{ + + uint64_t error; + int cpu_list_size; + + pcpup->pc_mondo_data = malloc(INTR_REPORT_SIZE, M_DEVBUF, M_WAITOK | M_ZERO); + PANIC_IF(pcpup->pc_mondo_data == NULL) + pcpup->pc_mondo_data_ra = vtophys(pcpup->pc_mondo_data); + + cpu_list_size = CPU_LIST_SIZE > INTR_REPORT_SIZE ? CPU_LIST_SIZE : INTR_REPORT_SIZE; + pcpup->pc_cpu_list = malloc(cpu_list_size, M_DEVBUF, M_WAITOK | M_ZERO); + PANIC_IF(pcpup->pc_cpu_list == NULL) + pcpup->pc_cpu_list_ra = vtophys(pcpup->pc_cpu_list); + + pcpup->pc_cpu_q = malloc(INTR_CPU_Q_SIZE, M_DEVBUF, M_WAITOK | M_ZERO); + PANIC_IF(pcpup->pc_cpu_q == NULL); + pcpup->pc_cpu_q_ra = vtophys(pcpup->pc_cpu_q); + pcpup->pc_cpu_q_size = INTR_CPU_Q_SIZE; + + pcpup->pc_dev_q = malloc(INTR_DEV_Q_SIZE, M_DEVBUF, M_WAITOK | M_ZERO); + PANIC_IF(pcpup->pc_dev_q == NULL); + pcpup->pc_dev_q_ra = vtophys(pcpup->pc_dev_q); + pcpup->pc_dev_q_size = INTR_DEV_Q_SIZE; + + pcpup->pc_rq = malloc(2*CPU_RQ_SIZE, M_DEVBUF, M_WAITOK | M_ZERO); + PANIC_IF(pcpup->pc_rq == NULL); + pcpup->pc_rq_ra = vtophys(pcpup->pc_rq); + pcpup->pc_rq_size = CPU_RQ_SIZE; + + pcpup->pc_nrq = malloc(2*CPU_NRQ_SIZE, M_DEVBUF, M_WAITOK | M_ZERO); + PANIC_IF(pcpup->pc_nrq == NULL); + pcpup->pc_nrq_ra = vtophys(pcpup->pc_nrq); + pcpup->pc_nrq_size = CPU_NRQ_SIZE; + + error = hv_cpu_qconf(Q(CPU_MONDO_QUEUE_HEAD), pcpup->pc_cpu_q_ra, cpu_q_entries); + if (error != H_EOK) + panic("cpu_mondo queue configuration failed: %lu", error); + + error = hv_cpu_qconf(Q(DEV_MONDO_QUEUE_HEAD), pcpup->pc_dev_q_ra, dev_q_entries); + if (error != H_EOK) + panic("dev_mondo queue configuration failed: %lu", error); + + error = hv_cpu_qconf(Q(RESUMABLE_ERROR_QUEUE_HEAD), pcpup->pc_rq_ra, CPU_RQ_ENTRIES); + if (error != H_EOK) + panic("resumable error queue configuration failed: %lu", error); + + error = hv_cpu_qconf(Q(NONRESUMABLE_ERROR_QUEUE_HEAD), pcpup->pc_nrq_ra, CPU_NRQ_ENTRIES); + if (error != H_EOK) + panic("non-resumable error queue configuration failed: %lu", error); + + +} ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/machdep.c#6 (text+ko) ==== @@ -363,11 +363,6 @@ } /* - * Initialize the interrupt tables. - */ - intr_init1(); - - /* * Initialize proc0 stuff (p_contested needs to be done early). */ proc_linkup(&proc0, &ksegrp0, &thread0); @@ -415,7 +410,6 @@ msgbufinit(msgbufp, MSGBUF_SIZE); mutex_init(); - intr_init2(); /* * Finish pmap initialization now that we're ready for mutexes. ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/pmap.c#7 (text+ko) ==== @@ -282,13 +282,6 @@ */ mmu_fault_status_area = pmap_bootstrap_alloc(MMFSA_SIZE*MAXCPU); - /* - * Allocate mondo areas for cpu / dev mondos - * - */ - - /* XXX SUN4V_FIXME - add allocation here */ - /* * Allocate and map the message buffer. */ ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/trap.c#4 (text+ko) ==== @@ -88,6 +88,8 @@ #include <machine/tsb.h> #include <machine/watch.h> #include <machine/wstate.h> + +#include <machine/md_var.h> #include <machine/hypervisor_api.h> void trap(struct trapframe *tf);
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