From owner-freebsd-arm@freebsd.org Sat Aug 18 07:07:23 2018 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 35F2C1087D03 for ; Sat, 18 Aug 2018 07:07:23 +0000 (UTC) (envelope-from mw@semihalf.com) Received: from mail-io0-x234.google.com (mail-io0-x234.google.com [IPv6:2607:f8b0:4001:c06::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id A66D2853FF for ; Sat, 18 Aug 2018 07:07:22 +0000 (UTC) (envelope-from mw@semihalf.com) Received: by mail-io0-x234.google.com with SMTP id q4-v6so8675333iob.8 for ; Sat, 18 Aug 2018 00:07:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=phQLoDxaixhv5/DQWxqzbVmiAH0CmX67PtS8CrEgPOk=; b=iStmSMdayx45fxvQlMTaCfAV1C2bb/b8TT1aJ89bCyshXEYavoXDID39zd1fpw4mdp u+8GWZ2Rq8UoCi6aatkADIyls6InAlgRnTMo4O/9jHKwXjVCuQuHbzN15jSFdoDDTrMZ ZEvjrrzN4F1ZPTe6mGa+BC9oin1iRRgmx4zRknR2/Cearps2Cp8KyZuTcAP8IE28sNkb NHtf8BGPvXq4T1W1cvSDg1XBa3pej4c9FfKE8A/19b16pyRI1zD/avHuE1SnvOrH60uF mwNdbiPKvzh+sWwLIr0uqzEpOHhLJdZVLTc2WI6ffcZyBJSsp13lnKLWsK6I+j9Po2du nvMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=phQLoDxaixhv5/DQWxqzbVmiAH0CmX67PtS8CrEgPOk=; b=ELRPj9ZupupWwjOB5hAn8Kyz8ir1p6/O9N9yL2NPV+So0UAQLh/p9hwAkzlSDac9Ip rUz5RU3bAVXzBnIzK41tiDMuDCvgd++a4a1qsmlaAyxIdzvEYqejl4zm3TNvG3ruGaov uUrsfI9hTulyDFX9SDfIvtYC4BFMu8bukk3r2fvB0mEWUOx/6N3AoBB7BTW0KmSM0ITS 32eFOrsq1L22gcgj2fFw+meT4pH5/mv/WpZgR9hi+EXkDRtxR6RIgJvcbM0lXuYByOgr NI/oi5ZDcm2jDR3MlUcV6ENkQYuaqGJLFexkceSH6WoSqa5kxMg+J5oMwT6LJa5fNMF5 GT3A== X-Gm-Message-State: APzg51A42SDNju3z2kSJt4bC0daDhAsynaD5lcGz9ox+fpbRDfrfhtD9 otv8wEzi7R5pom9o2ltWJYa7jitExB4UYKouIbulXg== X-Google-Smtp-Source: ANB0Vdb358PAYDZ8uM/f8/bTL3eF1ko00Y/9R05AQAWUc0gs+Yt61e1HO8BwpPf34ieacsugQ7BGZCde1F+ry/oyktU= X-Received: by 2002:a6b:198e:: with SMTP id 136-v6mr2201726ioz.248.1534576041910; Sat, 18 Aug 2018 00:07:21 -0700 (PDT) MIME-Version: 1.0 References: <4DCCA5C9-C156-4080-A8F9-035478AC2FF7@yahoo.com> In-Reply-To: From: Marcin Wojtas Date: Sat, 18 Aug 2018 09:07:10 +0200 Message-ID: Subject: Re: MACCHIATObin To: marklmi@yahoo.com Cc: freebsd-arm , Jim Thompson Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 18 Aug 2018 07:07:23 -0000 sob., 18 sie 2018 o 08:43 Marcin Wojtas napisa=C5=82(a): > > sob., 18 sie 2018 o 01:10 Jim Thompson napisa=C5=82(a): > > > > > > > > On Aug 17, 2018, at 5:42 PM, Mark Millard via freebsd-arm wrote: > > > > > Marcin Wojtas mw at semihalf.com wrote on > > > Fri May 11 07:55:40 UTC 2018 : > > > > > >> Short status of the support - last year we enabled most of the > > >> platform functionalities (core support, USB, AHCI, RTC). Three big > > >> items remained left: > > >> - PCIE root complex (this should work soon with the work done for > > >> another SoC, not merged yet) > > >> - Network PPv2 > > >> - Xenon SD/MMC controller > > > > > > > > > I noticed a check in that deals with that "Xenon" > > > SD/MMC controller: > > > > > > Author: loos > > > Date: Tue Aug 14 16:33:30 2018 > > > New Revision: 337772 > > > URL: > > > https://svnweb.freebsd.org/changeset/base/337772 > > > > > > > > > Log: > > > Add support to the Marvell Xenon SDHCI controller. > > > > > > Tested on Espresso.bin (37x0) and Macchiato.bin (8k) with SD cards a= nd > > > eMMCs. > > > > > > Obtained from: pfSense > > > Sponsored by: Rubicon Communications, LLC (Netgate) > > > > > > Added: > > > head/sys/dev/sdhci/sdhci_xenon.c (contents, props changed) > > > head/sys/dev/sdhci/sdhci_xenon.h (contents, props changed) > > > Modified: > > > head/sys/arm64/conf/GENERIC > > > head/sys/conf/files.arm64 > > > . . . > > > > > > But I've not noticed check-ins for the other of the "big > > > items" going by. (Though they may have.) > > > > > > Care to comment-on/update-the actual status for the > > > Macchiato.bin(s)? > > > > > > tl;dr: It=E2=80=99s not =E2=80=98there=E2=80=99 yet. > > > > Specifics: > > > > - loos@ has done a lot of work to get the espresso.bin working, and som= e of this carries over to the 8k/7k. > > - We have another internal developer working on an EIP-97 driver for cr= ypto offload. This should be a foundation for the EIP-197 in the 8K. > > - I know manu@is working on pin controllers and clocks specific to Mach= iatto.bin (80x0/70x0). > > - Getting the NICs, PCIe, etc working still remains to be done. > > > > About the latter - the NIC is pretty complex, however we (Semihalf) > have really huge experience with all its support implementations and > the platform itself. I'll put it straightforward - it's only a matter > of development funding, if it's guaranteed, we will do it with > pleasure :) As well as the NIC support (DW Synopsys driver for DT and > verify/improve on pcie-host-generic with ACPI). "As well as PCIE support..." of course. Marcin