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Date:      Tue, 27 May 1997 08:53:55 +0200
From:      Stefan Esser <se@FreeBSD.ORG>
To:        Steve Passe <smp@csn.net>
Cc:        Glenn Johnson <gljohnsn@iamerica.net>, freebsd-current@FreeBSD.ORG, smp@FreeBSD.ORG
Subject:   Re: errors on startup
Message-ID:  <19970527085355.54719@x14.mi.uni-koeln.de>
In-Reply-To: <199705270511.XAA07097@Ilsa.StevesCafe.com>; from Steve Passe on Mon, May 26, 1997 at 11:11:19PM -0600
References:  <199705270425.XAA00218@Gforce.iamerica.net> <199705270511.XAA07097@Ilsa.StevesCafe.com>

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On May 26, Steve Passe <smp@csn.net> wrote:
> The new pci code that was committed the last 24 hours broke several things.
> Stefan got most of them fixed a few hours ago.  I just got SMP working about
> 30 minutes ago.  For those behind slow mirrors here's the fix for the SMP
> problem:

Sorry for the breakage I introduced, but the changes 
were quite large (13 source file, complete), and I 
tested whatever I oculd, before doing the commit.

Two things that I had no way of testing were broken:
Configuration mechanism 1 register accesses, and the
SMP APIC support.

The moment I arrived at home, I remembered why you
had problems with the APIC: The new PCI code is not
derived from the previous one, but a completely new
design. And I had not commited the SMP changes to the 
PCI code and had forgotten about them by now, though 
I had suggested them, some time ago ...

O well ...

> *** sys/pci/pci.c.ORIG  Mon May 26 21:28:45 1997
> --- sys/pci/pci.c       Mon May 26 22:09:01 1997
> ***************
> *** 332,337 ****
> --- 330,353 ----
>                 cfg->lattimer           = pci_cfgread(cfg, PCIR_LATTIMER, 1);
>                 cfg->intpin             = pci_cfgread(cfg, PCIR_INTPIN, 1);
>                 cfg->intline            = pci_cfgread(cfg, PCIR_INTLINE, 1);
> + 
> + #ifdef APIC_IO
> +               if (cfg->intline && (cfg->intline != 0xff)) {
> +                       u_char airq = 0xff;
> +                       u_char rirq = 0xff;
> + 
> +                       airq = get_pci_apic_irq(cfg->bus,
> +                                               cfg->slot, cfg->intpin);
> + 
> +                       if (airq != 0xff) {             /* APIC IRQ exists */
> +                               rirq = cfg->intline;    /* 're-directed' IRQ */
> +                               cfg->intline = airq;    /* use APIC IRQ */
> +                               pci_cfgwrite(cfg, PCIR_INTLINE, airq, 1);

Hmmm, I don't think we should do this anymore ...
The new data structure that holds a copy of the most 
important configuration space registers is there just
for the purpose of modifying parameters for drivers,
but without a need to actually change the register
contents ...

All the drivers will use whatever is in cfg->intline,
so there is no need for the register update, IMHO.

> +                               undirect_pci_irq(rirq);
> +                       }
> +               }
> + #endif  /* APIC_IO */
> + 
>                 cfg->mingnt             = pci_cfgread(cfg, PCIR_MINGNT, 1);
>                 cfg->maxlat             = pci_cfgread(cfg, PCIR_MAXLAT, 1);

Regards, STefan



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