From owner-cvs-src@FreeBSD.ORG Sun May 11 19:37:30 2003 Return-Path: Delivered-To: cvs-src@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id C9A4837B418; Sun, 11 May 2003 19:37:30 -0700 (PDT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6D1AF43F75; Sun, 11 May 2003 19:37:30 -0700 (PDT) (envelope-from peter@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.6/8.12.6) with ESMTP id h4C2bU0U040522; Sun, 11 May 2003 19:37:30 -0700 (PDT) (envelope-from peter@repoman.freebsd.org) Received: (from peter@localhost) by repoman.freebsd.org (8.12.6/8.12.6/Submit) id h4C2bTgj040521; Sun, 11 May 2003 19:37:29 -0700 (PDT) Message-Id: <200305120237.h4C2bTgj040521@repoman.freebsd.org> From: Peter Wemm Date: Sun, 11 May 2003 19:37:29 -0700 (PDT) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/amd64/amd64 cpu_switch.S exception.S genassym.c machdep.c sys_machdep.c src/sys/amd64/include pcb.h sysarch.h src/sys/amd64/isa icu_vector.S X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 12 May 2003 02:37:31 -0000 peter 2003/05/11 19:37:29 PDT FreeBSD src repository Modified files: sys/amd64/amd64 cpu_switch.S exception.S genassym.c machdep.c sys_machdep.c sys/amd64/include pcb.h sysarch.h sys/amd64/isa icu_vector.S Log: Give a %fs and %gs to userland. Use swapgs to obtain the kernel %GS.base value on entry and exit. This isn't as easy as it sounds because when we recursively trap or interrupt, we have to avoid duplicating the swapgs instruction or we end up back with the userland %gs. I implemented this by testing TF_CS to see if we're coming from supervisor mode already, and check for returning to supervisor. To avoid a race with interrupts in the brief period after beginning executing the handler and before the swapgs, convert all trap gates to interrupt gates, and reenable interrupts immediately after the swapgs. I am not happy with this. There are other possible ways to do this that should be investigated. (eg: storing the GS.base MSR value in the trapframe) Add some sysarch functions to let the userland code get to this. Approved by: re (blanket amd64/*) Revision Changes Path 1.139 +50 -26 src/sys/amd64/amd64/cpu_switch.S 1.108 +74 -37 src/sys/amd64/amd64/exception.S 1.143 +5 -0 src/sys/amd64/amd64/genassym.c 1.572 +28 -24 src/sys/amd64/amd64/machdep.c 1.83 +25 -1 src/sys/amd64/amd64/sys_machdep.c 1.51 +2 -0 src/sys/amd64/include/pcb.h 1.19 +19 -1 src/sys/amd64/include/sysarch.h 1.39 +8 -2 src/sys/amd64/isa/icu_vector.S