From owner-cvs-all@FreeBSD.ORG Wed Dec 5 05:25:37 2007 Return-Path: Delivered-To: cvs-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 832D516A419 for ; Wed, 5 Dec 2007 05:25:37 +0000 (UTC) (envelope-from jkoshy.freebsd@gmail.com) Received: from rv-out-0910.google.com (rv-out-0910.google.com [209.85.198.187]) by mx1.freebsd.org (Postfix) with ESMTP id B622413C45A for ; Wed, 5 Dec 2007 05:25:34 +0000 (UTC) (envelope-from jkoshy.freebsd@gmail.com) Received: by rv-out-0910.google.com with SMTP id l15so3623558rvb for ; Tue, 04 Dec 2007 21:25:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:message-id:to:cc:subject:in-reply-to:references:user-agent:mime-version:content-type:from:date:sender; bh=wgz5a3wpf5AijxN9fHjDYnLM9pRSlb1mmp3hvw92+EE=; b=gXPcL39NfKKT9GHCyE0bBSkaDTr9/QbULLzGzoL/xcWJ6LdmnrNwaVvx0EWzH/H25cS3h0n/iFogiCvwvZPKkpiywOxH60u/veiG7YgQwcdm1t/BwaqrmF5UyQdDJj7zyLh1aWtNwDyIphtV9eaedptSCqLVLkSONXBx//Uj4PE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=received:message-id:to:cc:subject:in-reply-to:references:user-agent:mime-version:content-type:from:date:sender; b=OG0POhRH/PFxVRw5mGf2Agj+rNug7KstuBUONxLCJbWUVGOFVf7z1FutfZrLJGIeqHa+2X1fEBLRtq7xOJLEz0Lj3U9shF2TRC04MuxIi/cK3jTJ6Z9lvEkdOcKoWmqdojWdKhgKrvlg87AnckhqfNBT2x6sBtnbKA3DQM0uD7g= Received: by 10.140.132.8 with SMTP id f8mr901171rvd.1196832334292; Tue, 04 Dec 2007 21:25:34 -0800 (PST) Received: from moria.unixconsulting.co.in ( [59.88.121.236]) by mx.google.com with ESMTPS id l17sm16694rvb.2007.12.04.21.24.01 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 04 Dec 2007 21:25:32 -0800 (PST) Message-ID: <86prxm5ksk.wl%koshy@unixconsulting.co.in> To: "Kip Macy" In-Reply-To: References: <200712031050.lB3AowcL055057@repoman.freebsd.org> User-Agent: Wanderlust/2.14.0 (Africa) SEMI/1.14.6 (Maruoka) FLIM/1.14.8 (=?ISO-8859-4?Q?Shij=F2?=) APEL/10.7 Emacs/21.3 (amd64--freebsd) MULE/5.0 (SAKAKI) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII From: Joseph Koshy Date: Wed, 05 Dec 2007 05:22:41 -0000 Sender: Joseph Koshy Cc: Joseph Koshy , src-committers@freebsd.org, cvs-all@freebsd.org, cvs-src@freebsd.org Subject: Re: cvs commit: src/sys/dev/hwpmc hwpmc_x86.c X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Dec 2007 05:25:37 -0000 km> Can you say a little more about what the differences are or where one km> could find a discussion of them without wading through different km> processor model revisions? Kris, SCC, and I have been obtaining km> sensible results using 0xE and 0xF for the small set of sampling km> operations that we use. Well I discovered them by wading through the documentation for different processor model revisions :). One set of hardware events requires 'core specificity' to be programmed on dual core processors. HWPMC's P6 MD layer knows nothing core specificity and does the wrong thing for such events. As a concrete example, consider events 0x21--0x27 which have P6 names 'L2_ADS', 'L2_DBUS_BUSY', 'L2_DBUS_BUSY_RD', 'L2_LINES_IN' etc. HWPMC's P6 driver sets the UMASK field [bits 8:15] of the PMC event select registers to 0x00 since this is the only valid value for P6 PMCs for these events. But for dual core "Core" family processors, per Intel's documentation for these events, bits 15:14 of the UMASK field should not be '00B'. Valid values are '11B' or '01B' with '00B' marked as reserved. [Tables 18-7 & A-3 of the Software Developer's Manual, System Programming Guide, Vol 3B]. Then there are potential differences between "Core" and "Core 2" PMCs that HWPMC'S P6 MD layer knows nothing about. For example, there are a class of P6 events that appear to be forward compatible with Intel "Core" processors but not with "Core 2" processors. As a specific example, P6 event LD_BLOCKS [0x03] has a valid UMASK value of exactly 0x00. For this event on "Core 2" family processors, documentation indicates that valid values of the UMASK field are 0x02/04/08/10/20 but not 0x00. In a separate table (Table A-4 in the System Programming Guide), a UMASK value of 0x00 is mentioned valid for Intel "Core" processors. So in short, although Core/Core2 PMCs overlap the functionality of the P6 PMCs they are not 100% backward compatible with them. Regards, Koshy