From owner-p4-projects@FreeBSD.ORG Sun Sep 27 20:48:42 2009 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id AFDCD1065672; Sun, 27 Sep 2009 20:48:42 +0000 (UTC) Delivered-To: perforce@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 73073106566C for ; Sun, 27 Sep 2009 20:48:42 +0000 (UTC) (envelope-from lulf@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 60E8A8FC0C for ; Sun, 27 Sep 2009 20:48:42 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id n8RKmgs4059190 for ; Sun, 27 Sep 2009 20:48:42 GMT (envelope-from lulf@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id n8RKmgMc059188 for perforce@freebsd.org; Sun, 27 Sep 2009 20:48:42 GMT (envelope-from lulf@FreeBSD.org) Date: Sun, 27 Sep 2009 20:48:42 GMT Message-Id: <200909272048.n8RKmgMc059188@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to lulf@FreeBSD.org using -f From: Ulf Lilleengen To: Perforce Change Reviews Cc: Subject: PERFORCE change 168941 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 27 Sep 2009 20:48:42 -0000 http://perforce.freebsd.org/chv.cgi?CH=168941 Change 168941 by lulf@lulf_nobby on 2009/09/27 20:48:24 - Rework devclock interface by putting the device itself responsible for storing a pointer to it's clock. This is necessary due to some devices having more than one clock, therefore there is no transparent way for for a the handler to know which clock a device wants. This also allows for a cleaner interface on both sides. - Introduce a machine-dependent handler of device clock requests, which the devclk implementation will use in order to lookup the appropriate clock for a device. Affected files ... .. //depot/projects/avr32/src/sys/avr32/avr32/at32.c#12 edit .. //depot/projects/avr32/src/sys/avr32/avr32/at32_hmatrix.c#3 edit .. //depot/projects/avr32/src/sys/avr32/avr32/at32_intc.c#2 edit .. //depot/projects/avr32/src/sys/avr32/avr32/at32_pio.c#3 edit .. //depot/projects/avr32/src/sys/avr32/avr32/at32_pm.c#9 edit .. //depot/projects/avr32/src/sys/avr32/avr32/at32_rtc.c#4 edit .. //depot/projects/avr32/src/sys/avr32/avr32/at32_sdramc.c#3 edit .. //depot/projects/avr32/src/sys/avr32/avr32/at32_smc.c#2 edit .. //depot/projects/avr32/src/sys/avr32/avr32/clock.c#7 edit .. //depot/projects/avr32/src/sys/avr32/conf/cpu/at32ap700x.hints#7 edit .. //depot/projects/avr32/src/sys/dev/mmc/atmel_mci.c#7 edit .. //depot/projects/avr32/src/sys/dev/uart/uart_dev_atmel.c#9 edit .. //depot/projects/avr32/src/sys/kern/devclk_if.m#7 edit .. //depot/projects/avr32/src/sys/kern/subr_devclk.c#8 edit .. //depot/projects/avr32/src/sys/sys/devclk.h#7 edit Differences ... ==== //depot/projects/avr32/src/sys/avr32/avr32/at32.c#12 (text+ko) ==== @@ -123,9 +123,6 @@ int rid; struct at32_softc *sc = device_get_softc(dev); - /* Initialize devclk manager. */ - devclk_init(); - /* Resource list for IRQ */ /* Reserve irqs from nexus ? */ sc->sc_irq_rman.rm_type = RMAN_ARRAY; ==== //depot/projects/avr32/src/sys/avr32/avr32/at32_hmatrix.c#3 (text+ko) ==== @@ -104,6 +104,7 @@ int regs_rid; bus_space_tag_t bst; bus_space_handle_t bsh; + devclk_t clk; }; static device_method_t at32_hmatrix_methods[] = { /* Device interface */ @@ -131,10 +132,16 @@ static int at32_hmatrix_attach(device_t dev) { + struct at32_hmatrix_softc *sc = device_get_softc(dev); int err; + sc->clk = devclk_alloc(dev); + if (sc->clk == NULL) + return (ENOMEM); + err = at32_hmatrix_activate(dev); if (err) { + devclk_free(sc->clk); return (err); } @@ -162,7 +169,9 @@ static int at32_hmatrix_detach(device_t dev) { + struct at32_hmatrix_softc *sc = device_get_softc(dev); at32_hmatrix_deactivate(dev); + devclk_free(sc->clk); return (0); } @@ -171,9 +180,6 @@ { struct at32_hmatrix_softc *sc = device_get_softc(dev); - /* Make sure device clock is enabled before writing */ - devclk_enable(dev); - /* Set private data and map register space */ sc->regs_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regs_rid, 0, ~0, 0, RF_ACTIVE); @@ -182,7 +188,7 @@ } sc->bsh = rman_get_bushandle(sc->regs_res); sc->bst = rman_get_bustag(sc->regs_res); - + devclk_enable(sc->clk); return (0); err: @@ -200,8 +206,7 @@ rman_get_rid(sc->regs_res), sc->regs_res); } - /* Turn off device clock */ - devclk_disable(dev); + devclk_disable(sc->clk); } #ifdef notyet ==== //depot/projects/avr32/src/sys/avr32/avr32/at32_intc.c#2 (text+ko) ==== @@ -69,6 +69,7 @@ int regs_rid; bus_space_tag_t bst; bus_space_handle_t bsh; + devclk_t clk; }; static device_method_t at32_intc_methods[] = { /* Device interface */ @@ -96,10 +97,15 @@ static int at32_intc_attach(device_t dev) { + struct at32_intc_softc *sc = device_get_softc(dev); int err; + sc->clk = devclk_alloc(dev); + if (sc->clk == NULL) + return (ENOMEM); err = at32_intc_activate(dev); if (err) { + devclk_free(sc->clk); return (err); } @@ -109,7 +115,10 @@ static int at32_intc_detach(device_t dev) { + struct at32_intc_softc *sc = device_get_softc(dev); + at32_intc_deactivate(dev); + devclk_free(sc->clk); return (0); } @@ -119,9 +128,6 @@ struct at32_intc_softc *sc = device_get_softc(dev); int err = ENOMEM; - /* Make sure device clock is enabled before writing */ - devclk_enable(dev); - /* Set private data and map register space */ sc->regs_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regs_rid, 0, ~0, 0, RF_ACTIVE); @@ -131,6 +137,9 @@ sc->bsh = rman_get_bushandle(sc->regs_res); sc->bst = rman_get_bustag(sc->regs_res); + /* Make sure device clock is enabled before writing */ + devclk_enable(sc->clk); + return (0); err: @@ -149,5 +158,5 @@ } /* Turn off device clock */ - devclk_disable(dev); + devclk_disable(sc->clk); } ==== //depot/projects/avr32/src/sys/avr32/avr32/at32_pio.c#3 (text+ko) ==== @@ -55,6 +55,7 @@ /* Driver variables and private data */ struct at32_pio_softc { device_t dev; /* Myself */ + devclk_t clk; }; static device_method_t at32_pio_methods[] = { /* Device interface */ @@ -108,7 +109,10 @@ sc->dev = dev; /* Make sure clock is active before doing anything */ - devclk_enable(dev); + sc->clk = devclk_alloc(dev); + if (sc->clk == NULL) + return (ENOMEM); + devclk_enable(sc->clk); return 0; } @@ -116,6 +120,10 @@ static int at32_pio_detach(device_t dev) { + struct at32_pio_softc *sc = device_get_softc(dev); + + devclk_disable(sc->clk); + devclk_free(sc->clk); return (EBUSY); } ==== //depot/projects/avr32/src/sys/avr32/avr32/at32_pm.c#9 (text+ko) ==== @@ -38,6 +38,7 @@ #include #include #include +#include #include #include #include @@ -58,6 +59,84 @@ #define WR4(off, val) \ bus_space_write_4(sc->bst, sc->bsh, (off), (val)) +/* Tables to look up the mask index of a particular clock. */ +#define CPUMASK_LENGTH 1 +char *cpumask[1] = { + "PICO" +}; + +#define HSBMASK_LENGTH 10 +char *hsbmask[10] = { + "EBI", + "PBA", + "PBB", + "HRAMC", + "HSB", + "ISI", + "USB", + "LCDC", + "MACB0", + "DMA" +}; + +#define PBAMASK_LENGTH 17 +char *pbamask[17] = { + "SPI0", + "SPI1", + "TWI", + "USART0", + "USART1", + "USART2", + "USART3", + "SSC0", + "SSC1", + "SSC2", + "PIOA", + "PIOB", + "PIOC", + "PIOD", + "PIOE", + "PSIF", + "PDC" +}; + +#define PBBMASK_LENGTH 16 +char *pbbmask[16] = { + "PM", + "INTC", + "HMATRIX", + "TC0", + "TC1", + "PWM", + "MACB0", + "MACB1", + "DAC", + "MCI", + "AC97C", + "ISI", + "USB", + "SMC", + "SDRAMC", + "ECC" +}; + +/* + * Private devclk data for avr32. + */ +struct avr32_devclk { + uint16_t mask; + uint16_t index; +}; + +/* Driver variables and private data */ +struct at32_pm_softc { + struct resource *regs_res; + int regs_rid; + bus_space_tag_t bst; + bus_space_handle_t bsh; + devclk_list_t devclks; +}; + /* Prototypes */ static int at32_pm_probe(device_t); static int at32_pm_attach(device_t); @@ -65,10 +144,10 @@ static int at32_pm_activate(device_t); static void at32_pm_deactivate(device_t); -static void at32_mci_enable(devclk_t); -static void at32_mci_disable(devclk_t); -static uint64_t at32_mci_get_rate(devclk_t); -static int at32_mci_set_rate(devclk_t, uint64_t); +static void at32_devclk_enable(devclk_t); +static void at32_devclk_disable(devclk_t); +static uint64_t at32_devclk_get_rate(devclk_t); +static int at32_devclk_set_rate(devclk_t, uint64_t); static void at32_pll_enable(devclk_t); static void at32_pll_disable(devclk_t); @@ -80,21 +159,10 @@ static uint64_t at32_osc_get_rate(devclk_t); static int at32_osc_set_rate(devclk_t, uint64_t); -/* Driver variables and private data */ -struct at32_pm_softc { - struct resource *regs_res; - int regs_rid; - bus_space_tag_t bst; - bus_space_handle_t bsh; -}; - -#if 0 -struct at32_clk_softc { - const char *name; - int index; - devclk_t clk; -}; -#endif +struct devclk *at32_pm_alloc_devclk(device_t, const char *); +void at32_pm_free_devclk(device_t, devclk_t); +static void at32_clk_enable(struct at32_pm_softc *, uint16_t, uint16_t); +static void at32_clk_disable(struct at32_pm_softc *, uint16_t, uint16_t); static device_method_t at32_pm_methods[] = { /* Device interface */ @@ -102,6 +170,9 @@ DEVMETHOD(device_attach, at32_pm_attach), DEVMETHOD(device_detach, at32_pm_detach), + DEVMETHOD(devclk_alloc, at32_pm_alloc_devclk), + DEVMETHOD(devclk_free, at32_pm_free_devclk), + {0, 0}, }; static driver_t at32_pm_driver = { @@ -133,15 +204,15 @@ }; DEFINE_CLASS(at32_pll, at32_pll_methods, sizeof(struct devclk)); -/* Class defining the mci device clock. */ -static kobj_method_t at32_mci_methods[] = { - KOBJMETHOD(devclk_enable, at32_mci_enable), - KOBJMETHOD(devclk_disable, at32_mci_disable), - KOBJMETHOD(devclk_set_rate, at32_mci_set_rate), - KOBJMETHOD(devclk_get_rate, at32_mci_get_rate), +/* Class for all device clocks. */ +static kobj_method_t at32_devclk_methods[] = { + KOBJMETHOD(devclk_enable, at32_devclk_enable), + KOBJMETHOD(devclk_disable, at32_devclk_disable), + KOBJMETHOD(devclk_set_rate, at32_devclk_set_rate), + KOBJMETHOD(devclk_get_rate, at32_devclk_get_rate), {0, 0}, }; -DEFINE_CLASS(at32_mci, at32_mci_methods, sizeof(struct devclk)); +DEFINE_CLASS(at32_devclk, at32_devclk_methods, sizeof(struct devclk)); /* Code */ static int @@ -178,31 +249,28 @@ devclk_t clk; int err = ENOMEM; + devclk_register_handler(dev); /* Set private data and map register space */ sc->regs_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regs_rid, 0, ~0, 0, RF_ACTIVE); -/* sc->clock_res = bus_alloc_resource(dev, SYS_RES_CLOCK, &sc->clock_res, - RF_ACTIVE);*/ if (!sc->regs_res) { goto err; } sc->bsh = rman_get_bushandle(sc->regs_res); sc->bst = rman_get_bustag(sc->regs_res); + STAILQ_INIT(&sc->devclks); /* Register main clocks. */ - //devclk_register_clock(dev, "osc32", NULL); - devclk_register_clock(dev, &at32_osc_class, "osc0"); - //devclk_register_clock(dev, &sc->osc1, "osc1", NULL); + clk = devclk_create(dev, &at32_osc_class, "osc0"); + STAILQ_INSERT_HEAD(&sc->devclks, clk, link); + clk = devclk_create(dev, &at32_osc_class, "osc1"); + STAILQ_INSERT_HEAD(&sc->devclks, clk, link); + clk = devclk_create(dev, &at32_osc_class, "osc32"); + STAILQ_INSERT_HEAD(&sc->devclks, clk, link); /* Register prescalers. */ - clk = devclk_register_clock(dev, &at32_pll_class, "pll0"); - devclk_set_parent(clk, "osc0"); //devclk_register_clock(dev, &sc->pll1, "pll1", &sc->osc0); - - /* Register master device clocks. */ - clk = devclk_register_clock(dev, &at32_mci_class, "mci"); - devclk_set_parent(clk, "pll0"); - /* XXX: Implement rest of device clocks. */ + /* XXX: Implement PLLs */ return (0); err: @@ -219,50 +287,109 @@ bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->regs_res), sc->regs_res); } +} + +struct devclk * +at32_pm_alloc_devclk(device_t dev, const char *name) +{ + struct devclk *clk; + struct avr32_devclk *mclk; + uint16_t mask; + uint16_t i; + + /* Lookup if we have the clock. */ + for (i = 0; i < CPUMASK_LENGTH; i++) { + if (strcmp(cpumask[i], name) == 0) { + clk = devclk_create(dev, &at32_devclk_class, name); + mask = AT32_PM_CPUMASK; + goto found; + } + } + for (i = 0; i < HSBMASK_LENGTH; i++) { + if (strcmp(hsbmask[i], name) == 0) { + clk = devclk_create(dev, &at32_devclk_class, name); + mask = AT32_PM_HSBMASK; + goto found; + } + } + for (i = 0; i < PBAMASK_LENGTH; i++) { + if (strcmp(pbamask[i], name) == 0) { + clk = devclk_create(dev, &at32_devclk_class, name); + mask = AT32_PM_PBAMASK; + goto found; + } + } + for (i = 0; i < PBBMASK_LENGTH; i++) { + if (strcmp(pbbmask[i], name) == 0) { + clk = devclk_create(dev, &at32_devclk_class, name); + mask = AT32_PM_PBBMASK; + goto found; + } + } + return (NULL); /* Not found */ +found: + mclk = malloc(sizeof(struct avr32_devclk), M_DEVBUF, M_ZERO | M_WAITOK); + if (mclk == NULL) + return (NULL); + mclk->mask = mask; + mclk->index = i; + clk->data = mclk; + printf("Found clock %s in mask %x and index %d!\n", name, mclk->mask, mclk->index); + return (clk); +} - /* Turn off device clock */ - devclk_disable(dev); +void +at32_pm_free_devclk(device_t dev, devclk_t clk) +{ + struct avr32_devclk *mclk; + + mclk = clk->data; + free(mclk, M_DEVBUF); } static void -at32_mci_enable(devclk_t clk) +at32_devclk_enable(devclk_t clk) { - struct at32_pm_softc *sc; - uint32_t reg; + KASSERT(clk != NULL, ("NULL clk")); + struct at32_pm_softc *sc = device_get_softc(clk->dev); + struct avr32_devclk *mclk = clk->data; + + printf("Enabling %s: %d %d\n", clk->name, mclk->mask, mclk->index); - KASSERT(clk != NULL, ("NULL clk")); - sc = device_get_softc(clk->dev); - reg = RD4(AT32_PM_PBBMASK); - WR4(AT32_PM_PBBMASK, reg | (1 << 9)); + at32_clk_enable(sc, mclk->mask, mclk->index); } static void -at32_mci_disable(devclk_t clk) +at32_devclk_disable(devclk_t clk) { - struct at32_pm_softc *sc; - uint32_t reg; + KASSERT(clk != NULL, ("NULL clk")); + struct at32_pm_softc *sc = device_get_softc(clk->dev); + struct avr32_devclk *mclk = clk->data; - KASSERT(clk != NULL, ("NULL clk")); - sc = device_get_softc(clk->dev); - reg = RD4(AT32_PM_PBBMASK); - WR4(AT32_PM_PBBMASK, reg & ~(1 << 9)); + at32_clk_disable(sc, mclk->mask, mclk->index); } static uint64_t -at32_mci_get_rate(devclk_t clk) +at32_devclk_get_rate(devclk_t clk) { -/* unsigned long cksel, shift = 0; - clksel = RD4(AT32_PM_CKSEL); +#if 0 + struct at32_pm_softc *sc = device_get_softc(clk->dev); + unsigned long cksel, shift = 0; + cksel = RD4(AT32_PM_CKSEL); - if (clksel & (1 << AT32_PM_CKSEL_PBBDIV)) { + if (cksel & (1 << AT32_PM_CKSEL_PBBDIV)) { shift = 0; // XXX: Need to take divider into account - }*/ - // XXX: Assume OSC0 for now. Fix later. + } + devclk_t parent = clk->parent; + uint64_t rate = DEVCLK_GET_RATE(clk->parent); + return (rate >> shift); + return (20000000); +#endif return (20000000); } static int -at32_mci_set_rate(devclk_t clk, uint64_t rate) +at32_devclk_set_rate(devclk_t clk, uint64_t rate) { return (0); } @@ -270,7 +397,7 @@ static void at32_osc_enable(devclk_t clk) { -} +} static void at32_osc_disable(devclk_t clk) @@ -292,7 +419,7 @@ static void at32_pll_enable(devclk_t clk) { -} +} static void at32_pll_disable(devclk_t clk) @@ -310,3 +437,23 @@ { return (0); } + +static void +at32_clk_enable(struct at32_pm_softc *sc, uint16_t mask, uint16_t index) +{ + uint32_t reg; + + KASSERT(sc != NULL, ("NULL sc")); + reg = RD4(mask); + WR4(mask, reg | (1 << index)); +} + +static void +at32_clk_disable(struct at32_pm_softc *sc, uint16_t mask, uint16_t index) +{ + uint32_t reg; + + KASSERT(sc != NULL, ("NULL sc")); + reg = RD4(mask); + WR4(mask, reg & ~(1 << index)); +} ==== //depot/projects/avr32/src/sys/avr32/avr32/at32_rtc.c#4 (text+ko) ==== @@ -75,6 +75,7 @@ int regs_rid; bus_space_tag_t bst; bus_space_handle_t bsh; + devclk_t clk; }; static device_method_t at32_rtc_methods[] = { /* Device interface */ @@ -108,8 +109,13 @@ struct at32_rtc_softc *sc = device_get_softc(dev); int err; + sc->clk = devclk_alloc(dev); + if (sc->clk == NULL) + return (ENOMEM); + err = at32_rtc_activate(dev); if (err) { + devclk_free(sc->clk); return (err); } @@ -135,6 +141,7 @@ WR4(AT32_RTC_IER, bit_offset(RTC, IER, TOPI)); at32_rtc_deactivate(dev); + devclk_free(sc->clk); return (0); } @@ -161,9 +168,6 @@ struct at32_rtc_softc *sc = device_get_softc(dev); int err = ENOMEM; - /* Make sure device clock is enabled before writing */ - devclk_enable(dev); - /* Set private data and map register space */ sc->regs_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regs_rid, 0, ~0, 0, RF_ACTIVE); @@ -173,6 +177,9 @@ sc->bsh = rman_get_bushandle(sc->regs_res); sc->bst = rman_get_bustag(sc->regs_res); + /* Make sure device clock is enabled before writing */ + devclk_enable(sc->clk); + return (0); err: @@ -191,5 +198,5 @@ } /* Turn off device clock */ - devclk_disable(dev); + devclk_disable(sc->clk); } ==== //depot/projects/avr32/src/sys/avr32/avr32/at32_sdramc.c#3 (text+ko) ==== @@ -71,6 +71,7 @@ int regs_rid; bus_space_tag_t bst; bus_space_handle_t bsh; + devclk_t clk; }; static device_method_t at32_sdramc_methods[] = { /* Device interface */ @@ -103,8 +104,12 @@ register_t reg; char *type; + sc->clk = devclk_alloc(dev); + if (sc->clk == NULL) + return (ENOMEM); err = at32_sdramc_activate(dev); if (err) { + devclk_free(sc->clk); return (err); } @@ -146,7 +151,10 @@ static int at32_sdramc_detach(device_t dev) { + struct at32_sdramc_softc *sc = device_get_softc(dev); + at32_sdramc_deactivate(dev); + devclk_free(sc->clk); return (0); } @@ -156,9 +164,6 @@ struct at32_sdramc_softc *sc = device_get_softc(dev); int err = ENOMEM; - /* Make sure device clock is enabled before writing */ - devclk_enable(dev); - /* Set private data and map register space */ sc->dev = dev; sc->regs_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regs_rid, 0, @@ -170,6 +175,9 @@ sc->bsh = rman_get_bushandle(sc->regs_res); sc->bst = rman_get_bustag(sc->regs_res); + /* Make sure device clock is enabled before writing */ + devclk_enable(sc->clk); + /* TODO: Setup timer to call at32_sdramc_intr() */ return (0); @@ -190,7 +198,7 @@ } /* Turn off device clock */ - devclk_disable(dev); + devclk_disable(sc->clk); } #ifdef notyet ==== //depot/projects/avr32/src/sys/avr32/avr32/at32_smc.c#2 (text+ko) ==== @@ -87,6 +87,7 @@ bus_space_handle_t bsh; struct resource *mem_res; struct rman mem_rman; + devclk_t clk; }; struct at32_smc_ivar { struct resource_list resources; @@ -142,8 +143,9 @@ struct at32_smc_softc *sc = device_get_softc(dev); int err = ENOMEM; - /* Make sure device clock is enabled before writing */ - devclk_enable(dev); + sc->clk = devclk_alloc(dev); + if (sc->clk == NULL) + return (ENOMEM); /* Set private data and map register space */ sc->regs_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->regs_rid, 0, @@ -165,9 +167,12 @@ bus_generic_probe(dev); bus_enumerate_hinted_children(dev); bus_generic_attach(dev); + + devclk_enable(sc->clk); return (0); err: + devclk_free(sc->clk); at32_smc_deactivate(dev); return (err); } @@ -175,6 +180,7 @@ static int at32_smc_detach(device_t dev) { + at32_smc_deactivate(dev); return (0); } @@ -188,9 +194,6 @@ bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->regs_res), sc->regs_res); } - - /* Turn off device clock */ - devclk_disable(dev); } static device_t ==== //depot/projects/avr32/src/sys/avr32/avr32/clock.c#7 (text+ko) ==== @@ -46,7 +46,6 @@ #include #include #include -#include #include #include @@ -122,9 +121,6 @@ struct clock_softc *sc = device_get_softc(dev); int rid, err = ENOMEM; - /* Make sure device clock is enabled before writing */ - devclk_enable(dev); - /* Setup register space */ rid = 0; sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, @@ -176,8 +172,6 @@ sc->regs_res = NULL; } - /* Turn off device clock */ - devclk_disable(dev); return (0); } ==== //depot/projects/avr32/src/sys/avr32/conf/cpu/at32ap700x.hints#7 (text+ko) ==== @@ -39,25 +39,25 @@ hint.uart.0.maddr="0xFFE00C00" hint.uart.0.msize="0x400" hint.uart.0.irq="6" -hint.uart.0.clk="pba:3" +hint.uart.0.clk="USART0" hint.uart.1.at="at32bus0" hint.uart.1.maddr="0xFFE01000" hint.uart.1.msize="0x400" hint.uart.1.irq="7" -hint.uart.1.clk="pba:4" +hint.uart.1.clk="USART1" hint.uart.2.at="at32bus0" hint.uart.2.maddr="0xFFE01400" hint.uart.2.msize="0x400" hint.uart.2.irq="8" -hint.uart.2.clk="pba:5" +hint.uart.2.clk="USART2" hint.uart.3.at="at32bus0" hint.uart.3.maddr="0xFFE01800" hint.uart.3.msize="0x400" hint.uart.3.irq="9" -hint.uart.3.clk="pba:6" +hint.uart.3.clk="USART3" hint.atmel_ssc.0.at="at32bus0" hint.atmel_ssc.0.maddr="0xFFE01C00" @@ -117,7 +117,7 @@ hint.at32_rtc.0.maddr="0xFFF00080" hint.at32_rtc.0.msize="0x30" hint.at32_rtc.0.irq="21" -hint.at32_rtc.0.clk="pbb:0" +hint.at32_rtc.0.clk="PM" hint.at32_wdt.0.at="at32bus0" hint.at32_wdt.0.maddr="0xFFF000B0" @@ -133,12 +133,12 @@ hint.at32_intc.0.at="at32bus0" hint.at32_intc.0.maddr="0xFFF00400" hint.at32_intc.0.msize="0x400" -hint.at32_intc.0.clk="pbb:1" +hint.at32_intc.0.clk="INTC" hint.at32_hmatrix.0.at="at32bus0" hint.at32_hmatrix.0.maddr="0xFFF00800" hint.at32_hmatrix.0.msize="0x400" -hint.at32_hmatrix.0.clk="pbb:2" +hint.at32_hmatrix.0.clk="HMATRIX" hint.at32_tc.0.at="at32bus0" hint.at32_tc.0.maddr="0xFFF00C00" @@ -187,7 +187,7 @@ hint.atmel_mci.0.maddr="0xFFF02400" hint.atmel_mci.0.msize="0x400" hint.atmel_mci.0.irq="28" -hint.atmel_mci.0.clk="mci" +hint.atmel_mci.0.clk="MCI" hint.at32_ac97c.0.at="at32bus0" hint.at32_ac97c.0.maddr="0xFFF02800" @@ -204,12 +204,12 @@ hint.at32_smc.0.at="at32bus0" hint.at32_smc.0.maddr="0xFFF03400" hint.at32_smc.0.msize="0x400" -hint.at32_smc.0.clk="pbb:13" +hint.at32_smc.0.clk="SMC" hint.at32_sdramc.0.at="at32bus0" hint.at32_sdramc.0.maddr="0xFFF03800" hint.at32_sdramc.0.msize="0x400" -hint.at32_sdramc.0.clk="pbb:14" +hint.at32_sdramc.0.clk="SDRAMC" hint.at32_eec.0.at="at32bus0" hint.at32_eec.0.maddr="0xFFF03C00" ==== //depot/projects/avr32/src/sys/dev/mmc/atmel_mci.c#7 (text+ko) ==== @@ -74,6 +74,7 @@ #define STOP_STARTED 2 struct resource *irq_res; /* IRQ resource */ struct resource *mem_res; /* Memory resource */ + struct devclk *clk; /* Device clock. */ struct mtx sc_mtx; bus_dma_tag_t dmatag; bus_dmamap_t map; @@ -169,6 +170,9 @@ device_t child; sc->dev = dev; + sc->clk = devclk_alloc(dev); + if (sc->clk == NULL) + return (ENOMEM); err = atmel_mci_activate(dev); if (err) goto out; @@ -199,7 +203,7 @@ ATMEL_MCI_LOCK_DESTROY(sc); goto out; } - mci_clockfreq = devclk_get_rate(dev); + mci_clockfreq = devclk_get_rate(sc->clk); #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) sc->host.f_min = DIV_ROUND_UP(mci_clockfreq, 512); sc->host.f_max = mci_clockfreq / 2; @@ -214,14 +218,19 @@ out:; if (err) atmel_mci_deactivate(dev); + devclk_free(sc->clk); return (err); } static int atmel_mci_detach(device_t dev) { + struct atmel_mci_softc *sc; + + sc = device_get_softc(dev); atmel_mci_fini(dev); atmel_mci_deactivate(dev); + devclk_free(sc->clk); return (EBUSY); /* XXX */ } @@ -231,9 +240,6 @@ struct atmel_mci_softc *sc; int rid; - /* Enable device clock before writing. */ - devclk_enable(dev); - sc = device_get_softc(dev); rid = 0; sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, @@ -245,6 +251,7 @@ RF_ACTIVE); if (sc->irq_res == NULL) goto errout; + devclk_enable(sc->clk); return (0); errout: atmel_mci_deactivate(dev); @@ -271,7 +278,7 @@ sc->irq_res = 0; /* Turn off device clock. */ - devclk_disable(dev); + devclk_disable(sc->clk); return; } @@ -439,12 +446,10 @@ // assert locked if (!(sc->flags & CMD_STARTED)) { sc->flags |= CMD_STARTED; - printf("Starting CMD\n"); atmel_mci_start_cmd(sc, req->cmd); return; } if (!(sc->flags & STOP_STARTED) && req->stop) { - printf("Starting Stop\n"); sc->flags |= STOP_STARTED; atmel_mci_start_cmd(sc, req->stop); return; @@ -550,7 +555,6 @@ ATMEL_MCI_LOCK(sc); sr = RD4(sc, MCI_SR) & RD4(sc, MCI_IMR); - printf("i 0x%x\n", sr); cmd = sc->curcmd; if (sr & MCI_SR_ERROR) { // Ignore CRC errors on CMD2 and ACMD47, per relevant standards @@ -572,40 +576,40 @@ } } else { if (sr & MCI_SR_TXBUFE) { - printf("TXBUFE\n"); + //printf("TXBUFE\n"); atmel_mci_xmit_done(sc); } if (sr & MCI_SR_RXBUFF) { - printf("RXBUFF\n"); + //printf("RXBUFF\n"); WR4(sc, MCI_IDR, MCI_SR_RXBUFF); WR4(sc, MCI_IER, MCI_SR_CMDRDY); } if (sr & MCI_SR_ENDTX) { - printf("ENDTX\n"); + //printf("ENDTX\n"); } >>> TRUNCATED FOR MAIL (1000 lines) <<<