Date: Thu, 17 Mar 2016 06:40:55 +0100 From: K Staring <qdk@quickdekay.net> To: freebsd-x11@freebsd.org Subject: Trying to get macbookpro8,2 to work with HD3000 with X11 Message-ID: <79349882-9E32-4DFA-8875-33006775852D@quickdekay.net>
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Hi,
Does anyone have a macbookpro8,2 working with some version of FreeBSD, =
with the Intel HD 3000 active in X11?
The problems I=E2=80=99m encountering are as follows. I=E2=80=99m using =
FreeBSD 11-CURRENT, a very recent checkout (i.e. after the merge of the =
drm 3.8 stuff).
The machine has both a discrete ATi chipset (HD 6770M) and integrated HD =
3000 in its Sandy Brigde CPU.
---- when booting FreeBSD using EFI
The active graphics chipset apparently is the ATi chipset. loading =
radeonkms fails as it cannot find the video card bios (my main goal is =
to use the HD3000 anyway, so no big problem). Loading i915kms makes the =
console unresponsive, but the machine keeps running. Blindly, it=E2=80=99s=
possible to start X11, but without much to see, that doesn=E2=80=99t =
really accomplish anything. ;)
It looks like it=E2=80=99s possible to switch to the integrated CPU =
using the four =E2=80=9Coutb=E2=80=9D statements (see switch.c, also =
tried setting them in boot.4th when loader is patched with attached =
patch), but still neither a console nor something displayed when =
subsequently loading i915kms and starting X.
---- when booting FreeBSD using an MBR formatted partition
Interestingly only the ATi chipset is recognised. pciconf -lv does not =
even show the HD 3000 at pci:0:0:2:0! In this configuration, the =
radeonkms modules loads successfully and I can even run X11. It=E2=80=99s =
a pity the machine then consumes 35 watts idling. Graphics works, but =
with such high battery drain, it=E2=80=99s not really an option.
I=E2=80=99m not using rEFInd since pressing =E2=80=98alt=E2=80=99 when =
booting seems to accomplish the same thing; the mac EFI shows a boot =
selector and can boot into both EFI and MBR partitions (might require a =
firmware upgrade). Am I correct in this assertion?
Does anyone know if it=E2=80=99s possible to use the integrated =
HD 3000 gfx to run X11 on a macbookpro8,2?
Attached are dmesg and pciconf output, as well as a program (mostly =
copied from somewhere on the internet) to switch to/from the integrated =
graphics and a patch to be able to use =E2=80=98outb=E2=80=99 in amd64 =
in boot.4th (it only worked on i386, but the machine is amd64).
Thanks for any reply!
K Staring
++(dmesg.out)
Copyright (c) 1992-2016 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
The Regents of the University of California. All rights =
reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 11.0-CURRENT #1 ebabdea(master): Tue Mar 15 19:44:05 CET 2016
qdk@Seska:/usr/src/sys/amd64/compile/SESKA amd64
FreeBSD clang version 3.7.1 (tags/RELEASE_371/final 255217) 20151225
VT(efifb): resolution 1680x1050
CPU: Intel(R) Core(TM) i7-2760QM CPU @ 2.40GHz (2400.07-MHz K8-class =
CPU)
Origin=3D"GenuineIntel" Id=3D0x206a7 Family=3D0x6 Model=3D0x2a =
Stepping=3D7
[=E2=80=A6]
info: [drm] Initialized drm 1.1.0 20060810
drmn1: <Intel SandyBridge (M)> on vgapci1
info: [drm] Memory usable by graphics device =3D 2048M
info: [drm] MTRR allocation failed. Graphics performance may suffer.
iicbus0: <Philips I2C bus> on iicbb0 addr 0xff
iic0: <I2C generic I/O> on iicbus0
iic1: <I2C generic I/O> on iicbus1
iicbus2: <Philips I2C bus> on iicbb1 addr 0x0
iic2: <I2C generic I/O> on iicbus2
iic3: <I2C generic I/O> on iicbus3
iicbus4: <Philips I2C bus> on iicbb2 addr 0x0
iic4: <I2C generic I/O> on iicbus4
iic5: <I2C generic I/O> on iicbus5
iicbus6: <Philips I2C bus> on iicbb3 addr 0x0
iic6: <I2C generic I/O> on iicbus6
iic7: <I2C generic I/O> on iicbus7
iicbus8: <Philips I2C bus> on iicbb4 addr 0x0
iic8: <I2C generic I/O> on iicbus8
iic9: <I2C generic I/O> on iicbus9
iicbus10: <Philips I2C bus> on iicbb5 addr 0x0
iic10: <I2C generic I/O> on iicbus10
iic11: <I2C generic I/O> on iicbus11
info: [drm] MSI enabled 1 message(s)
info: [drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
info: [drm] Driver supports precise vblank timestamp query.
drmn1: taking over the fictitious range 0xa0000000-0xb0000000
info: [drm] Connector LVDS-1: get mode from tunables:
info: [drm] - kern.vt.fb.modes.LVDS-1
info: [drm] - kern.vt.fb.default_mode
info: [drm] Connector VGA-1: get mode from tunables:
info: [drm] - kern.vt.fb.modes.VGA-1
info: [drm] - kern.vt.fb.default_mode
info: [drm] Connector HDMI-A-1: get mode from tunables:
info: [drm] - kern.vt.fb.modes.HDMI-A-1
info: [drm] - kern.vt.fb.default_mode
info: [drm] Connector DP-1: get mode from tunables:
info: [drm] - kern.vt.fb.modes.DP-1
info: [drm] - kern.vt.fb.default_mode
info: [drm] GMBUS [i915 gmbus vga] timed out, falling back to bit =
banging on pin 2
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
drmn1: warning: VGA-1: EDID block 0 invalid.
info: [drm] Enabling RC6 states: RC6 on, RC6p off, RC6pp off
fbd1 on drmn1
VT: Replacing driver "efifb" with new "fb".
info: [drm] Initialized i915 1.6.0 20080730 for drmn1 on minor 1
=E2=80=94(dmesg.out)
++(pciconf.out)
hostb0@pci0:0:0:0: class=3D0x060000 card=3D0x00dc106b =
chip=3D0x01048086 rev=3D0x09 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '2nd Generation Core Processor Family DRAM =
Controller'
class =3D bridge
subclass =3D HOST-PCI
pcib1@pci0:0:1:0: class=3D0x060400 card=3D0x00dc106b =
chip=3D0x01018086 rev=3D0x09 hdr=3D0x01
vendor =3D 'Intel Corporation'
device =3D 'Xeon E3-1200/2nd Generation Core Processor Family =
PCI Express Root Port'
class =3D bridge
subclass =3D PCI-PCI
pcib2@pci0:0:1:1: class=3D0x060400 card=3D0x00dc106b =
chip=3D0x01058086 rev=3D0x09 hdr=3D0x01
vendor =3D 'Intel Corporation'
device =3D 'Xeon E3-1200/2nd Generation Core Processor Family =
PCI Express Root Port'
class =3D bridge
subclass =3D PCI-PCI
vgapci1@pci0:0:2:0: class=3D0x030000 card=3D0x00dc106b =
chip=3D0x01268086 rev=3D0x09 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '2nd Generation Core Processor Family Integrated =
Graphics Controller'
class =3D display
subclass =3D VGA
bar [10] =3D type Memory, range 64, base 0xb0000000, size 4194304, =
enabled
bar [18] =3D type Prefetchable Memory, range 64, base 0xa0000000, =
size 268435456, enabled
bar [20] =3D type I/O Port, range 32, base 0x3000, size 64, =
enabled
none0@pci0:0:22:0: class=3D0x078000 card=3D0x72708086 =
chip=3D0x1c3a8086 rev=3D0x04 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family MEI Controller'
class =3D simple comms
bar [10] =3D type Memory, range 64, base 0xb0907100, size 16, =
enabled
uhci0@pci0:0:26:0: class=3D0x0c0300 card=3D0x72708086 =
chip=3D0x1c2c8086 rev=3D0x05 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family USB Universal =
Host Controller'
class =3D serial bus
subclass =3D USB
bar [20] =3D type I/O Port, range 32, base 0x3120, size 32, =
enabled
ehci0@pci0:0:26:7: class=3D0x0c0320 card=3D0x72708086 =
chip=3D0x1c2d8086 rev=3D0x05 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family USB Enhanced =
Host Controller'
class =3D serial bus
subclass =3D USB
bar [10] =3D type Memory, range 32, base 0xb0906c00, size 1024, =
enabled
hdac1@pci0:0:27:0: class=3D0x040300 card=3D0x72708086 =
chip=3D0x1c208086 rev=3D0x05 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family High Definition =
Audio Controller'
class =3D multimedia
subclass =3D HDA
bar [10] =3D type Memory, range 64, base 0xb0900000, size 16384, =
enabled
pcib3@pci0:0:28:0: class=3D0x060400 card=3D0x72708086 =
chip=3D0x1c108086 rev=3D0xb5 hdr=3D0x01
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family PCI Express Root =
Port 1'
class =3D bridge
subclass =3D PCI-PCI
pcib4@pci0:0:28:1: class=3D0x060400 card=3D0x72708086 =
chip=3D0x1c128086 rev=3D0xb5 hdr=3D0x01
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family PCI Express Root =
Port 2'
class =3D bridge
subclass =3D PCI-PCI
pcib5@pci0:0:28:2: class=3D0x060400 card=3D0x72708086 =
chip=3D0x1c148086 rev=3D0xb5 hdr=3D0x01
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family PCI Express Root =
Port 3'
class =3D bridge
subclass =3D PCI-PCI
uhci1@pci0:0:29:0: class=3D0x0c0300 card=3D0x72708086 =
chip=3D0x1c278086 rev=3D0x05 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family USB Universal =
Host Controller'
class =3D serial bus
subclass =3D USB
bar [20] =3D type I/O Port, range 32, base 0x30c0, size 32, =
enabled
ehci1@pci0:0:29:7: class=3D0x0c0320 card=3D0x72708086 =
chip=3D0x1c268086 rev=3D0x05 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family USB Enhanced =
Host Controller'
class =3D serial bus
subclass =3D USB
bar [10] =3D type Memory, range 32, base 0xb0906800, size 1024, =
enabled
isab0@pci0:0:31:0: class=3D0x060100 card=3D0x72708086 =
chip=3D0x1c498086 rev=3D0x05 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D 'HM65 Express Chipset Family LPC Controller'
class =3D bridge
subclass =3D PCI-ISA
ahci0@pci0:0:31:2: class=3D0x010601 card=3D0x72708086 =
chip=3D0x1c038086 rev=3D0x05 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family 6 port SATA AHCI =
Controller'
class =3D mass storage
subclass =3D SATA
bar [10] =3D type I/O Port, range 32, base 0x3148, size 8, enabled
bar [14] =3D type I/O Port, range 32, base 0x315c, size 4, enabled
bar [18] =3D type I/O Port, range 32, base 0x3140, size 8, enabled
bar [1c] =3D type I/O Port, range 32, base 0x3158, size 4, enabled
bar [20] =3D type I/O Port, range 32, base 0x3060, size 32, =
enabled
bar [24] =3D type Memory, range 32, base 0xb0906000, size 2048, =
enabled
none1@pci0:0:31:3: class=3D0x0c0500 card=3D0x72708086 =
chip=3D0x1c228086 rev=3D0x05 hdr=3D0x00
vendor =3D 'Intel Corporation'
device =3D '6 Series/C200 Series Chipset Family SMBus =
Controller'
class =3D serial bus
subclass =3D SMBus
bar [10] =3D type Memory, range 64, base 0xb0907000, size 256, =
enabled
bar [20] =3D type I/O Port, range 32, base 0xefa0, size 32, =
enabled
vgapci0@pci0:1:0:0: class=3D0x030000 card=3D0x00f8106b =
chip=3D0x67401002 rev=3D0x00 hdr=3D0x00
vendor =3D 'Advanced Micro Devices, Inc. [AMD/ATI]'
device =3D 'Whistler [Radeon HD 6730M/6770M/7690M XT]'
class =3D display
subclass =3D VGA
bar [10] =3D type Prefetchable Memory, range 64, base 0x90000000, =
size 268435456, enabled
bar [18] =3D type Memory, range 64, base 0xb0800000, size 131072, =
enabled
bar [20] =3D type I/O Port, range 32, base 0x2000, size 256, =
enabled
hdac0@pci0:1:0:1: class=3D0x040300 card=3D0xaa900000 =
chip=3D0xaa901002 rev=3D0x00 hdr=3D0x00
vendor =3D 'Advanced Micro Devices, Inc. [AMD/ATI]'
device =3D 'Turks/Whistler HDMI Audio [Radeon HD 6000 Series]'
class =3D multimedia
subclass =3D HDA
bar [10] =3D type Memory, range 64, base 0xb0840000, size 16384, =
enabled
bge0@pci0:2:0:0: class=3D0x020000 card=3D0x16b414e4 =
chip=3D0x16b414e4 rev=3D0x10 hdr=3D0x00
vendor =3D 'Broadcom Corporation'
device =3D 'NetXtreme BCM57765 Gigabit Ethernet PCIe'
class =3D network
subclass =3D ethernet
bar [10] =3D type Prefetchable Memory, range 64, base 0xb0400000, =
size 65536, enabled
bar [18] =3D type Prefetchable Memory, range 64, base 0xb0410000, =
size 65536, enabled
sdhci_pci0@pci0:2:0:1: class=3D0x080501 card=3D0x000014e4 =
chip=3D0x16bc14e4 rev=3D0x10 hdr=3D0x00
vendor =3D 'Broadcom Corporation'
device =3D 'BCM57765/57785 SDXC/MMC Card Reader'
class =3D base peripheral
subclass =3D SD host controller
bar [10] =3D type Prefetchable Memory, range 64, base 0xb0420000, =
size 65536, enabled
none2@pci0:3:0:0: class=3D0x028000 card=3D0x00d6106b =
chip=3D0x433114e4 rev=3D0x02 hdr=3D0x00
vendor =3D 'Broadcom Corporation'
device =3D 'BCM4331 802.11a/b/g/n'
class =3D network
bar [10] =3D type Memory, range 64, base 0xb0600000, size 16384, =
enabled
none3@pci0:4:0:0: class=3D0x0c0010 card=3D0x590011c1 =
chip=3D0x590111c1 rev=3D0x08 hdr=3D0x00
vendor =3D 'LSI Corporation'
device =3D 'FW643 [TrueFire] PCIe 1394b Controller'
class =3D serial bus
subclass =3D FireWire
bar [10] =3D type Memory, range 64, base 0xb0500000, size 4096, =
enabled
=E2=80=94(pciconf.out)
++(switch.c)
=
//http://blog.tkassembled.com/364/intel-graphics-on-a-2011-macbook-pro-in-=
linux/
#include <stdio.h>=20
#include <fcntl.h>
#include <stdlib.h>
#include <sys/types.h>
#include <machine/cpufunc.h>
#define PORT_SWITCH_DISPLAY 0x710
#define PORT_SWITCH_SELECT 0x728
#define PORT_SWITCH_DDC 0x740
#define PORT_DISCRETE_POWER 0x750
static int gmux_switch_to_igd()
{
outb(PORT_SWITCH_SELECT, 1);
outb(PORT_SWITCH_DISPLAY, 2);
outb(PORT_SWITCH_DDC, 2);
return 0;
}
static void mbp_gpu_power(int state)
{
outb(PORT_DISCRETE_POWER, state);
}
static void mb_gpu_print()
{
printf("SELECT: %hhu\n", inb(PORT_SWITCH_SELECT));
printf("DISPLAY: %hhu\n", inb(PORT_SWITCH_DISPLAY));
printf("DDC: %hhu\n", inb(PORT_SWITCH_DDC));
printf("POWER: %hhu\n", inb(PORT_DISCRETE_POWER));
}
int main(int argc, char **argv)
{
if (open("/dev/io", O_RDWR) < 0) {
perror ("No IO permissions");
return 1;
}
printf("Before:\n");
mb_gpu_print();
if (argc > 1) {
int state =3D atoi(argv[1]);
mbp_gpu_power(state);
gmux_switch_to_igd();
printf("After:\n");
mb_gpu_print();
}
return 0;
}
=E2=80=94(switch.c)
++(boot_with_outb.patch)
diff --git a/boot/ficl/amd64/sysdep.c b/boot/ficl/amd64/sysdep.c
index 5957b71..5ffc758 100644
--- a/boot/ficl/amd64/sysdep.c
+++ b/boot/ficl/amd64/sysdep.c
@@ -14,6 +14,9 @@
#include <stdlib.h>
#else
#include <stand.h>
+#if defined(__i386__) || defined(__x86_64__)
+#include <machine/cpufunc.h>
+#endif
#endif
#include "ficl.h"
=20
@@ -77,6 +80,39 @@ void ficlFree (void *p)
free(p);
}
=20
+#ifndef TESTMAIN
+#if defined(__i386__) || defined(__x86_64__)
+/*=20
+ * outb ( port# c -- )
+ * Store a byte to I/O port number port#
+ */
+void
+ficlOutb(FICL_VM *pVM)
+{
+ u_char c;
+ u_int32_t port;
+
+ port=3DstackPopUNS(pVM->pStack);
+ c=3D(u_char)stackPopINT(pVM->pStack);
+ outb(port,c);
+}
+
+/*
+ * inb ( port# -- c )
+ * Fetch a byte from I/O port number port#
+ */
+void
+ficlInb(FICL_VM *pVM)
+{
+ u_char c;
+ u_int32_t port;
+
+ port=3DstackPopUNS(pVM->pStack);
+ c=3Dinb(port);
+ stackPushINT(pVM->pStack,c);
+}
+#endif
+#endif
=20
/*
** Stub function for dictionary access control - does nothing
diff --git a/boot/ficl/ficl.h b/boot/ficl/ficl.h
index 6fe9e10..6dea13c 100644
--- a/boot/ficl/ficl.h
+++ b/boot/ficl/ficl.h
@@ -1113,7 +1113,7 @@ extern CELL dictIncrease;
** Various FreeBSD goodies
*/
=20
-#if defined(__i386__) && !defined(TESTMAIN)
+#if (defined(__i386__) || defined(__x86_64__)) && !defined(TESTMAIN)
extern void ficlOutb(FICL_VM *pVM);
extern void ficlInb(FICL_VM *pVM);
#endif
diff --git a/boot/ficl/i386/sysdep.c b/boot/ficl/i386/sysdep.c
index df0891d..5ffc758 100644
--- a/boot/ficl/i386/sysdep.c
+++ b/boot/ficl/i386/sysdep.c
@@ -14,7 +14,7 @@
#include <stdlib.h>
#else
#include <stand.h>
-#ifdef __i386__
+#if defined(__i386__) || defined(__x86_64__)
#include <machine/cpufunc.h>
#endif
#endif
@@ -81,7 +81,7 @@ void ficlFree (void *p)
}
=20
#ifndef TESTMAIN
-#ifdef __i386__
+#if defined(__i386__) || defined(__x86_64__)
/*=20
* outb ( port# c -- )
* Store a byte to I/O port number port#
diff --git a/boot/ficl/loader.c b/boot/ficl/loader.c
index 6641438..5721997 100644
--- a/boot/ficl/loader.c
+++ b/boot/ficl/loader.c
@@ -921,7 +921,7 @@ void ficlCompilePlatform(FICL_SYSTEM *pSys)
dictAppendWord(dp, "findfile", ficlFindfile, FW_DEFAULT);
dictAppendWord(dp, "ccall", ficlCcall, FW_DEFAULT);
#ifndef TESTMAIN
-#ifdef __i386__
+#if defined(__i386__) || defined(__x86_64__)
dictAppendWord(dp, "outb", ficlOutb, FW_DEFAULT);
dictAppendWord(dp, "inb", ficlInb, FW_DEFAULT);
#endif
=E2=80=94(boot_with_outb.patch)=
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