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Date:      Thu, 6 Mar 2003 10:21:19 -0800
From:      "John Stockdale" <jstockdale@stanford.edu>
To:        <freebsd-smp@FreeBSD.ORG>
Subject:   RE: SMP hang on boot in RELENG_4_7 on Iwill DP533 board
Message-ID:  <002401c2e40d$303199e0$3d2c0c80@quenya>
In-Reply-To: <200303061109.h26B9nd00841@c-24-130-253-104.we.client2.attbi.com>

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I was actually having the same problem with 4.7-RELEASE and 5.0-RELEASE,
except I was using a Tyan i7505 board (same chipset, comparable board I
believe). Anyway, to make a long story short, the problem I was having
stemmed from a problem in the code that was merged after 4.7-RELEASE and
didn't actually make it in until Early Feb. As soon as I installed
4.8-RC1 the SMP kernel booted fine and found all 4 processors (well 2 x
2 (HyperThreading)).

Good Luck

-John

-----Original Message-----
From: owner-freebsd-smp@FreeBSD.ORG
[mailto:owner-freebsd-smp@FreeBSD.ORG] On Behalf Of Mike O'Brien
Sent: Thursday, March 06, 2003 3:10 AM
To: freebsd-smp@FreeBSD.ORG
Subject: SMP hang on boot in RELENG_4_7 on Iwill DP533 board


	I'm running dual Xeon processors on an Iwill DP533 board.
This board has an E7505 MCH chipset from Intel, using the ICH4 I/O hub
and an 82870P2 PCI-X controller.

	This configuration does the same thing that John Stockdale
reported on his Tyan Thunder i7505 board: it runs fine with a
uniprocessor kernel, but attempting to boot an SMP kernel results in a
hang at the point where the kernel has just printed "APIC_IO: Testing
8254 interrupt delivery."

	Rather than muck with my BIOS as he did, I mucked with the
kernel. This message is printed by clock.c, just before executing a
"while" loop waiting for some I/O register action.  That action never
happens. Not figuring it would work, but figuring it'd at least be
instructive, I inserted a count-backward-from-a-million escape hatch so
the loop would run for a while, then exit.

	The resulting kernel did boot, and did turn on the second
processor, and seemed to run OK until I tried to do a "make
installworld".  I got a ton of disk read and write timeout errors,
probably because the APIC_IO wasn't, in fact, set up correctly.

	My understanding is that a good part of these problems are that
the developers don't have access to the hardware needed to test stuff
out. Any SMP developer who wants to work with me on testing fixes to
this problem, send me private email, please, and let's see if we can
work something out. I for dang sure don't want to be limited to a single
processor.

	Suggestions welcome.  I don't know, for example, if the APIC
setup in 5.0 has been improved to the point where I should try running
it.  I was avoiding it, but I could give it a try if there's a chance
it'll work.

	Comments?

Mike O'Brien


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