From owner-p4-projects@FreeBSD.ORG Fri Oct 29 05:09:04 2004 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id E45BD16A4D0; Fri, 29 Oct 2004 05:09:03 +0000 (GMT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id ABDE916A4CE for ; Fri, 29 Oct 2004 05:09:03 +0000 (GMT) Received: from ns1.xcllnt.net (209-128-86-226.bayarea.net [209.128.86.226]) by mx1.FreeBSD.org (Postfix) with ESMTP id 692F943D1F for ; Fri, 29 Oct 2004 05:09:03 +0000 (GMT) (envelope-from marcel@xcllnt.net) Received: from [192.168.4.250] (dhcp50.pn.xcllnt.net [192.168.4.250]) by ns1.xcllnt.net (8.13.1/8.13.1) with ESMTP id i9T58pnF001797; Thu, 28 Oct 2004 22:08:51 -0700 (PDT) (envelope-from marcel@xcllnt.net) In-Reply-To: <20041028.223619.64820618.imp@bsdimp.com> References: <200410290407.i9T47TB4031009@repoman.freebsd.org> <20041028.223619.64820618.imp@bsdimp.com> Mime-Version: 1.0 (Apple Message framework v619) Content-Type: text/plain; charset=US-ASCII; format=flowed Message-Id: <9EDA1144-2968-11D9-BC1F-000D93C47836@xcllnt.net> Content-Transfer-Encoding: 7bit From: Marcel Moolenaar Date: Thu, 28 Oct 2004 22:08:50 -0700 To: "M. Warner Losh" X-Mailer: Apple Mail (2.619) cc: perforce@freebsd.org Subject: Re: PERFORCE change 63901 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Oct 2004 05:09:04 -0000 On Oct 28, 2004, at 9:36 PM, M. Warner Losh wrote: > In message: <200410290407.i9T47TB4031009@repoman.freebsd.org> > Marcel Moolenaar writes: > : http://perforce.freebsd.org/chv.cgi?CH=63901 > : > : Change 63901 by marcel@marcel_nfs on 2004/10/29 04:07:23 > : > : Add a rough (i.e. sketchy) bus frontend for a new scc(4) > : driver. The scc(4) driver will handle SCCs so that puc(4) > : can be released from that burden. No rocket science... > > What's SCC? Serial Communication Controller, the term used for controllers capable of multiple protocols like async, monosync, bisync and sdlc/hdlc. Both the Siemens SAB82532 and the Zilog Z8530 are SCCs. The intend of scc(4) is to help deal with synchronisation between channels. The Z8530, due to its origin, uses multiplexed registers with each register containing bits for either or both channels. This is very nasty and requires that the otherwise independent channels are synchronised WRT hardware access. A secundary goal is to allow drivers for synchronous communication to share the scc bus with uart(4) so that the SCC can be programmed accordingly. -- Marcel Moolenaar USPA: A-39004 marcel@xcllnt.net