From owner-svn-src-head@freebsd.org Tue Oct 10 12:54:37 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id EB6C8E309A8; Tue, 10 Oct 2017 12:54:37 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id B5A9080841; Tue, 10 Oct 2017 12:54:37 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v9ACsaD6081552; Tue, 10 Oct 2017 12:54:36 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v9ACsaSD081550; Tue, 10 Oct 2017 12:54:36 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201710101254.v9ACsaSD081550@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Tue, 10 Oct 2017 12:54:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r324493 - in head/sys/arm64: arm64 include X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: in head/sys/arm64: arm64 include X-SVN-Commit-Revision: 324493 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Oct 2017 12:54:38 -0000 Author: andrew Date: Tue Oct 10 12:54:36 2017 New Revision: 324493 URL: https://svnweb.freebsd.org/changeset/base/324493 Log: Move the pmap_l0_index, etc. macros to pte.h. These will be used by the EFI Runtime Services code. Sponsored by: DARPA, AFRL Modified: head/sys/arm64/arm64/pmap.c head/sys/arm64/include/pte.h Modified: head/sys/arm64/arm64/pmap.c ============================================================================== --- head/sys/arm64/arm64/pmap.c Tue Oct 10 12:36:41 2017 (r324492) +++ head/sys/arm64/arm64/pmap.c Tue Oct 10 12:54:36 2017 (r324493) @@ -306,11 +306,6 @@ pagecopy(void *s, void *d) memcpy(d, s, PAGE_SIZE); } -#define pmap_l0_index(va) (((va) >> L0_SHIFT) & L0_ADDR_MASK) -#define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK) -#define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK) -#define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK) - static __inline pd_entry_t * pmap_l0(pmap_t pmap, vm_offset_t va) { Modified: head/sys/arm64/include/pte.h ============================================================================== --- head/sys/arm64/include/pte.h Tue Oct 10 12:36:41 2017 (r324492) +++ head/sys/arm64/include/pte.h Tue Oct 10 12:54:36 2017 (r324493) @@ -118,6 +118,11 @@ typedef uint64_t pt_entry_t; /* page table entry */ #define Ln_ADDR_MASK (Ln_ENTRIES - 1) #define Ln_TABLE_MASK ((1 << 12) - 1) +#define pmap_l0_index(va) (((va) >> L0_SHIFT) & L0_ADDR_MASK) +#define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK) +#define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK) +#define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK) + #endif /* !_MACHINE_PTE_H_ */ /* End of pte.h */