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From: Hans Petter Selasky <hselasky@FreeBSD.org>
Date: Wed, 2 Oct 2019 09:56:27 +0000 (UTC)
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Subject: svn commit: r352977 - head/sys/dev/mlx5
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Author: hselasky
Date: Wed Oct  2 09:56:27 2019
New Revision: 352977
URL: https://svnweb.freebsd.org/changeset/base/352977

Log:
  Sort the ports registers definitions numerically in mlx5core.
  
  Submitted by:	kib@
  MFC after:	3 days
  Sponsored by:	Mellanox Technologies

Modified:
  head/sys/dev/mlx5/driver.h

Modified: head/sys/dev/mlx5/driver.h
==============================================================================
--- head/sys/dev/mlx5/driver.h	Wed Oct  2 09:49:44 2019	(r352976)
+++ head/sys/dev/mlx5/driver.h	Wed Oct  2 09:56:27 2019	(r352977)
@@ -126,24 +126,24 @@ enum {
 	MLX5_REG_QCAM		 = 0x4019,
 	MLX5_REG_DCBX_PARAM	 = 0x4020,
 	MLX5_REG_DCBX_APP	 = 0x4021,
-	MLX5_REG_PCAP		 = 0x5001,
 	MLX5_REG_FPGA_CAP	 = 0x4022,
 	MLX5_REG_FPGA_CTRL	 = 0x4023,
 	MLX5_REG_FPGA_ACCESS_REG = 0x4024,
 	MLX5_REG_FPGA_SHELL_CNTR = 0x4025,
+	MLX5_REG_PCAP		 = 0x5001,
+	MLX5_REG_PMLP		 = 0x5002,
 	MLX5_REG_PMTU		 = 0x5003,
 	MLX5_REG_PTYS		 = 0x5004,
 	MLX5_REG_PAOS		 = 0x5006,
 	MLX5_REG_PFCC		 = 0x5007,
 	MLX5_REG_PPCNT		 = 0x5008,
-	MLX5_REG_PMAOS		 = 0x5012,
 	MLX5_REG_PUDE		 = 0x5009,
 	MLX5_REG_PPTB		 = 0x500B,
 	MLX5_REG_PBMC		 = 0x500C,
+	MLX5_REG_PELC		 = 0x500E,
+	MLX5_REG_PVLC		 = 0x500F,
 	MLX5_REG_PMPE		 = 0x5010,
-	MLX5_REG_PELC		 = 0x500e,
-	MLX5_REG_PVLC		 = 0x500f,
-	MLX5_REG_PMLP		 = 0x5002,
+	MLX5_REG_PMAOS		 = 0x5012,
 	MLX5_REG_PCAM		 = 0x507f,
 	MLX5_REG_NODE_DESC	 = 0x6001,
 	MLX5_REG_HOST_ENDIANNESS = 0x7004,