Date: Wed, 14 Jan 2009 20:00:36 GMT From: Andrew Turner <andrew@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 156172 for review Message-ID: <200901142000.n0EK0aRG021826@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=156172 Change 156172 by andrew@andrew_bender on 2009/01/14 19:59:50 Add the support for LCD and I2C memory Affected files ... .. //depot/projects/arm/src/sys/arm/s3c2xx0/neo1973_machdep.c#10 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410.c#18 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410reg.h#5 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2xx0var.h#8 edit Differences ... ==== //depot/projects/arm/src/sys/arm/s3c2xx0/neo1973_machdep.c#10 (text+ko) ==== @@ -165,6 +165,16 @@ }, { /* + * Map the LCD to VA == PA + */ + _A(S3C2410_LCDC_BASE), + _A(S3C2410_LCDC_BASE), + _S(S3C2410_LCDC_SIZE), + VM_PROT_READ|VM_PROT_WRITE, + PTE_NOCACHE, + }, + { + /* * Map the MMC/SD to VA == PA */ _A(S3C2410_SDI_BASE), @@ -174,6 +184,16 @@ PTE_NOCACHE, }, { + /* + * Map the IIC to VA == PA + */ + _A(S3C2410_IIC_BASE), + _A(S3C2410_IIC_BASE), + _S(S3C24X0_IIC_SIZE), + VM_PROT_READ|VM_PROT_WRITE, + PTE_NOCACHE, + }, + { 0, 0, 0, ==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410.c#18 (text+ko) ==== @@ -307,10 +307,18 @@ if (bus_space_map(iot, S3C2410_CLKMAN_BASE, S3C24X0_CLKMAN_SIZE, 0, &sc->sc_sx.sc_clkman_ioh)) panic("cannot map clock"); + /* LCD controller */ + if (bus_space_map(iot, S3C2410_LCDC_BASE, + S3C2410_LCDC_SIZE, 0, &sc->sc_sx.sc_lcd_ioh)) + panic("cannot map LCD"); /* MMC/SD */ if (bus_space_map(iot, S3C2410_SDI_BASE, S3C2410_SDI_SIZE, 0, &sc->sc_sx.sc_mci_ioh)) panic("cannot map MMC/SD"); + /* I2C */ + if (bus_space_map(iot, S3C2410_IIC_BASE, + S3C24X0_IIC_SIZE, 0, &sc->sc_sx.sc_iic_ioh)) + panic("cannot map IIC"); #if 0 /* Real time clock */ ==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410reg.h#5 (text+ko) ==== @@ -61,6 +61,7 @@ #define S3C2410_DMAC_SIZE 0xe4 #define S3C2410_CLKMAN_BASE 0x4c000000 /* clock & power management */ #define S3C2410_LCDC_BASE 0x4d000000 /* LCD controller */ +#define S3C2410_LCDC_SIZE 0x60 #define S3C2410_NANDFC_BASE 0x4e000000 /* NAND Flash controller */ #define S3C2410_NANDFC_SIZE 0x18 #define S3C2410_UART0_BASE 0x50000000 ==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2xx0var.h#8 (text+ko) ==== @@ -47,8 +47,10 @@ bus_space_handle_t sc_memctl_ioh; /* Memory controller */ bus_space_handle_t sc_clkman_ioh; /* Clock manager */ bus_space_handle_t sc_gpio_ioh; /* GPIO */ + bus_space_handle_t sc_lcd_ioh; /* LCD */ bus_space_handle_t sc_rtc_ioh; /* real time clock */ bus_space_handle_t sc_mci_ioh; /* MMC/SD */ + bus_space_handle_t sc_iic_ioh; /* IIC */ bus_dma_tag_t sc_dmat;
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