From owner-freebsd-arm@FreeBSD.ORG Fri Oct 23 16:48:41 2009 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E62DF106566C for ; Fri, 23 Oct 2009 16:48:41 +0000 (UTC) (envelope-from xcllnt@mac.com) Received: from asmtpout027.mac.com (asmtpout027.mac.com [17.148.16.102]) by mx1.freebsd.org (Postfix) with ESMTP id D2AB78FC0C for ; Fri, 23 Oct 2009 16:48:41 +0000 (UTC) MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: text/plain; charset=us-ascii; format=flowed; delsp=yes Received: from macbook-pro.jnpr.net (natint3.juniper.net [66.129.224.36]) by asmtp027.mac.com (Sun Java(tm) System Messaging Server 6.3-8.01 (built Dec 16 2008; 32bit)) with ESMTPSA id <0KRZ00BKC80CJWA0@asmtp027.mac.com> for freebsd-arm@freebsd.org; Fri, 23 Oct 2009 09:48:20 -0700 (PDT) From: Marcel Moolenaar In-reply-to: <200910231641.n9NGfN1a006721@casselton.net> Date: Fri, 23 Oct 2009 09:48:12 -0700 Message-id: <0C359698-59A4-4213-BC22-9F1483611EB5@mac.com> References: <200910231641.n9NGfN1a006721@casselton.net> To: Mark Tinguely X-Mailer: Apple Mail (2.1076) Cc: freebsd-arm@freebsd.org Subject: Re: [ARM+NFS] panic while copying across NFS X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Oct 2009 16:48:42 -0000 On Oct 23, 2009, at 9:41 AM, Mark Tinguely wrote: > >> >> On Oct 23, 2009, at 8:22 AM, Mark Tinguely wrote: >> >>> 3) pmap.c: PVF_REF is used to invalidate cache and flush tlb. >>> PVF_REF >>> is set by a trap when the page is really use. kernel pages should >>> assume it is immediately used. >> >> This causes problems for me, so I don't think this is quite right. >> FYI, >> >> -- >> Marcel Moolenaar >> xcllnt@mac.com > > Thank-you for the information. Hmmm, how odd. I will give that some > thought. > > To everyone else, I read my last post and a big sorry for incomplete > sentences. > It was just a quick list of things that could be changed to > streamline the > machine dependant portion of the code. Also to everyone: There's a huge amount of instability in the ARM VM/PMAP code. Things are slightly better when the L2 cache is configured for write-through, but there's at least 2 issues left: 1. Clustered I/O causes incoherency and pretty much makes the box useless when you want to run what you just built. 2. PMAP panics in one or two places, typically after a few minutes/hours of uptime when doing builds. With a L2 cache the problems are a bit more severe as it adds I-cache incoherency to the mix, which even prevents running init(8). I think w e need to rethink the PMAP layer, because if we keep trying to patch it, performance will probably worse from what it is now. Plus, we'll have to deal with physically indexed and physically tagged caches ASAP, so better modularization helps. FYI, -- Marcel Moolenaar xcllnt@mac.com