From owner-freebsd-arch Fri Jan 18 20:58:51 2002 Delivered-To: freebsd-arch@freebsd.org Received: from albatross.prod.itd.earthlink.net (albatross.mail.pas.earthlink.net [207.217.120.120]) by hub.freebsd.org (Postfix) with ESMTP id E2F5737B416 for ; Fri, 18 Jan 2002 20:58:47 -0800 (PST) Received: from pool0211.cvx40-bradley.dialup.earthlink.net ([216.244.42.211] helo=mindspring.com) by albatross.prod.itd.earthlink.net with esmtp (Exim 3.33 #1) id 16RnaE-0000vb-00; Fri, 18 Jan 2002 20:58:26 -0800 Message-ID: <3C48FCEF.9190CA08@mindspring.com> Date: Fri, 18 Jan 2002 20:58:23 -0800 From: Terry Lambert X-Mailer: Mozilla 4.7 [en]C-CCK-MCD {Sony} (Win98; U) X-Accept-Language: en MIME-Version: 1.0 To: Garrett Wollman Cc: mime@traveller.cz, arch@FreeBSD.org Subject: Re: 64 bit counters again References: <200201190350.g0J3oNN08944@khavrinen.lcs.mit.edu> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Sender: owner-freebsd-arch@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG Garrett Wollman wrote: > >> Yes. IA64. SPARC 9b (SPARC64) and Alpha, which are 64 > >> bits, require locks, since they don't have the ability to > >> do an atomic "lock; cmpxchg8b". > > > >Can they do "lock; add const,(mem)" in 32 or 64 bit? > > Terry is talking out of his ear again. > > Alpha most definitely does have 64-bit load-linked/store-conditional, > which is entirely equivalent to i386's 64-bit compare-exchange. (For > some reason in the Alpha ARM it's called ``load locked'' instead.) If > we cared about running on MIPS architectures, they have LL/SC as well. > SPARC v9 has 64-bit compare-and-swap (although unlike in IA32 a memory > barrier is also required); see the SPARC v9 Architecture Reference > Manual. IA64 has 64-bit compare-exchange as well; see the Itanium > Architecture Software Developer's Manual, volume 2 (Intel document > number 245318-003), where there's a whole section on implementing > synchronization primitives on IA84; it also has an atomic FETCHADD > instruction which I didn't bother to look more closely at. John Baldwin said: | Well, SMP on Pentium's maybe, but not on Alpha, sparc64, or ia64, all of which | support OOE and looser memory models than x86, meaning that you really need | locks unless you are going to have 386-specific code all over the place. I | suppose you can wrap it behind an MI API but that seems like a lot of work for | fairly small gain that can end up making the code uglier. So you can argue it out with him, Garrett. Meanwhile, with a 32 bit cmpxchg, I don't need locks at all, unless I want 64 bit counters so I can measure the wrong thing. -- Terry To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-arch" in the body of the message