From owner-svn-src-head@FreeBSD.ORG Mon Mar 24 08:24:33 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 02A12CC3; Mon, 24 Mar 2014 08:24:33 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D65C71B1; Mon, 24 Mar 2014 08:24:32 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s2O8OWN8075947; Mon, 24 Mar 2014 08:24:32 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s2O8OWjo075946; Mon, 24 Mar 2014 08:24:32 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201403240824.s2O8OWjo075946@svn.freebsd.org> From: Andrew Turner Date: Mon, 24 Mar 2014 08:24:32 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r263679 - head/sys/arm/include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 24 Mar 2014 08:24:33 -0000 Author: andrew Date: Mon Mar 24 08:24:32 2014 New Revision: 263679 URL: http://svnweb.freebsd.org/changeset/base/263679 Log: Move an else case that was missed in r263676 Modified: head/sys/arm/include/pmap.h Modified: head/sys/arm/include/pmap.h ============================================================================== --- head/sys/arm/include/pmap.h Mon Mar 24 01:21:37 2014 (r263678) +++ head/sys/arm/include/pmap.h Mon Mar 24 08:24:32 2014 (r263679) @@ -421,6 +421,31 @@ extern int pmap_needs_pte_sync; #define ARM_L2S_NRML_IWT_OWT (L2_C) #define ARM_L2S_NRML_IWB_OWB (L2_C|L2_B) #define ARM_L2S_NRML_IWBA_OWBA (L2_S_TEX(1)|L2_C|L2_B) +#else +#define ARM_L1S_STRONG_ORD (0) +#define ARM_L1S_DEVICE_NOSHARE (L1_S_TEX(2)) +#define ARM_L1S_DEVICE_SHARE (L1_S_B) +#define ARM_L1S_NRML_NOCACHE (L1_S_TEX(1)|L1_SHARED) +#define ARM_L1S_NRML_IWT_OWT (L1_S_C|L1_SHARED) +#define ARM_L1S_NRML_IWB_OWB (L1_S_C|L1_S_B|L1_SHARED) +#define ARM_L1S_NRML_IWBA_OWBA (L1_S_TEX(1)|L1_S_C|L1_S_B|L1_SHARED) + +#define ARM_L2L_STRONG_ORD (0) +#define ARM_L2L_DEVICE_NOSHARE (L2_L_TEX(2)) +#define ARM_L2L_DEVICE_SHARE (L2_B) +#define ARM_L2L_NRML_NOCACHE (L2_L_TEX(1)|L2_SHARED) +#define ARM_L2L_NRML_IWT_OWT (L2_C|L2_SHARED) +#define ARM_L2L_NRML_IWB_OWB (L2_C|L2_B|L2_SHARED) +#define ARM_L2L_NRML_IWBA_OWBA (L2_L_TEX(1)|L2_C|L2_B|L2_SHARED) + +#define ARM_L2S_STRONG_ORD (0) +#define ARM_L2S_DEVICE_NOSHARE (L2_S_TEX(2)) +#define ARM_L2S_DEVICE_SHARE (L2_B) +#define ARM_L2S_NRML_NOCACHE (L2_S_TEX(1)|L2_SHARED) +#define ARM_L2S_NRML_IWT_OWT (L2_C|L2_SHARED) +#define ARM_L2S_NRML_IWB_OWB (L2_C|L2_B|L2_SHARED) +#define ARM_L2S_NRML_IWBA_OWBA (L2_S_TEX(1)|L2_C|L2_B|L2_SHARED) +#endif /* SMP */ #elif ARM_NMMUS > 1 /* More than one MMU class configured; use variables. */ @@ -462,31 +487,6 @@ extern int pmap_needs_pte_sync; #define L1_C_PROTO L1_C_PROTO_xscale #define L2_S_PROTO L2_S_PROTO_xscale -#else -#define ARM_L1S_STRONG_ORD (0) -#define ARM_L1S_DEVICE_NOSHARE (L1_S_TEX(2)) -#define ARM_L1S_DEVICE_SHARE (L1_S_B) -#define ARM_L1S_NRML_NOCACHE (L1_S_TEX(1)|L1_SHARED) -#define ARM_L1S_NRML_IWT_OWT (L1_S_C|L1_SHARED) -#define ARM_L1S_NRML_IWB_OWB (L1_S_C|L1_S_B|L1_SHARED) -#define ARM_L1S_NRML_IWBA_OWBA (L1_S_TEX(1)|L1_S_C|L1_S_B|L1_SHARED) - -#define ARM_L2L_STRONG_ORD (0) -#define ARM_L2L_DEVICE_NOSHARE (L2_L_TEX(2)) -#define ARM_L2L_DEVICE_SHARE (L2_B) -#define ARM_L2L_NRML_NOCACHE (L2_L_TEX(1)|L2_SHARED) -#define ARM_L2L_NRML_IWT_OWT (L2_C|L2_SHARED) -#define ARM_L2L_NRML_IWB_OWB (L2_C|L2_B|L2_SHARED) -#define ARM_L2L_NRML_IWBA_OWBA (L2_L_TEX(1)|L2_C|L2_B|L2_SHARED) - -#define ARM_L2S_STRONG_ORD (0) -#define ARM_L2S_DEVICE_NOSHARE (L2_S_TEX(2)) -#define ARM_L2S_DEVICE_SHARE (L2_B) -#define ARM_L2S_NRML_NOCACHE (L2_S_TEX(1)|L2_SHARED) -#define ARM_L2S_NRML_IWT_OWT (L2_C|L2_SHARED) -#define ARM_L2S_NRML_IWB_OWB (L2_C|L2_B|L2_SHARED) -#define ARM_L2S_NRML_IWBA_OWBA (L2_S_TEX(1)|L2_C|L2_B|L2_SHARED) -#endif /* SMP */ #endif /* ARM_NMMUS > 1 */ #if defined(CPU_XSCALE_81342) || ARM_ARCH_6 || ARM_ARCH_7A